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| author | Sanjay Patel <spatel@rotateright.com> | 2018-10-12 15:22:14 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-10-12 15:22:14 +0000 |
| commit | f5b18923483fd6a033acd60b8036bd9d6642ccbd (patch) | |
| tree | 409b296956f60485c35303aa03d18728f0315071 /llvm/test/CodeGen/X86/extract-insert.ll | |
| parent | 0a3bb8197441ef5a659189686f12af26842bad53 (diff) | |
| download | bcm5719-llvm-f5b18923483fd6a033acd60b8036bd9d6642ccbd.tar.gz bcm5719-llvm-f5b18923483fd6a033acd60b8036bd9d6642ccbd.zip | |
[AArch64][x86] add tests for trunc disguised as vector ops (PR39016); NFC
These correspond to the IR transform from:
D52439
llvm-svn: 344353
Diffstat (limited to 'llvm/test/CodeGen/X86/extract-insert.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/extract-insert.ll | 55 |
1 files changed, 54 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/extract-insert.ll b/llvm/test/CodeGen/X86/extract-insert.ll index b3fb50de718..2393e32ebf6 100644 --- a/llvm/test/CodeGen/X86/extract-insert.ll +++ b/llvm/test/CodeGen/X86/extract-insert.ll @@ -29,7 +29,7 @@ define i8 @extractelt_bitcast(i32 %x) nounwind { } ; TODO: This should have folded to avoid vector ops, but the transform -; is guarded by 'hasOneUse'. That limitation apparently makes some AMDGPU +; is guarded by 'hasOneUse'. That limitation apparently makes some AMDGPU ; codegen better. define i8 @extractelt_bitcast_extra_use(i32 %x, <4 x i8>* %p) nounwind { @@ -60,3 +60,56 @@ define i8 @extractelt_bitcast_extra_use(i32 %x, <4 x i8>* %p) nounwind { ret i8 %ext } +define i32 @trunc_i64_to_i32_le(i64 %x) { +; X86-LABEL: trunc_i64_to_i32_le: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: retl +; +; X64-LABEL: trunc_i64_to_i32_le: +; X64: # %bb.0: +; X64-NEXT: movq %rdi, %xmm0 +; X64-NEXT: movd %xmm0, %eax +; X64-NEXT: retq + %ins = insertelement <2 x i64> undef, i64 %x, i32 0 + %bc = bitcast <2 x i64> %ins to <4 x i32> + %ext = extractelement <4 x i32> %bc, i32 0 + ret i32 %ext +} + +define i16 @trunc_i64_to_i16_le(i64 %x) { +; X86-LABEL: trunc_i64_to_i16_le: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: # kill: def $ax killed $ax killed $eax +; X86-NEXT: retl +; +; X64-LABEL: trunc_i64_to_i16_le: +; X64: # %bb.0: +; X64-NEXT: movq %rdi, %xmm0 +; X64-NEXT: movd %xmm0, %eax +; X64-NEXT: # kill: def $ax killed $ax killed $eax +; X64-NEXT: retq + %ins = insertelement <2 x i64> undef, i64 %x, i32 0 + %bc = bitcast <2 x i64> %ins to <8 x i16> + %ext = extractelement <8 x i16> %bc, i32 0 + ret i16 %ext +} + +define i8 @trunc_i32_to_i8_le(i32 %x) { +; X86-LABEL: trunc_i32_to_i8_le: +; X86: # %bb.0: +; X86-NEXT: movb {{[0-9]+}}(%esp), %al +; X86-NEXT: retl +; +; X64-LABEL: trunc_i32_to_i8_le: +; X64: # %bb.0: +; X64-NEXT: movl %edi, %eax +; X64-NEXT: # kill: def $al killed $al killed $eax +; X64-NEXT: retq + %ins = insertelement <4 x i32> undef, i32 %x, i32 0 + %bc = bitcast <4 x i32> %ins to <16 x i8> + %ext = extractelement <16 x i8> %bc, i32 0 + ret i8 %ext +} + |
