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| author | Sanjay Patel <spatel@rotateright.com> | 2018-10-21 20:13:29 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-10-21 20:13:29 +0000 |
| commit | e439cc2745323d2ac0e61de1e04efa0098f4b1a8 (patch) | |
| tree | 6365076050c6dc131a967da4aec0508cd91b0f4b /llvm/test/CodeGen/X86/extract-insert.ll | |
| parent | e967a12733565fff0beb16865bd21e381b75b250 (diff) | |
| download | bcm5719-llvm-e439cc2745323d2ac0e61de1e04efa0098f4b1a8.tar.gz bcm5719-llvm-e439cc2745323d2ac0e61de1e04efa0098f4b1a8.zip | |
[DAGCombiner] reduce insert+bitcast+extract vector ops to truncate (PR39016)
This is a late backend subset of the IR transform added with:
D52439
We can confirm that the conversion to a 'trunc' is correct by running:
$ opt -instcombine -data-layout="e"
(assuming the IR transforms are correct; change "e" to "E" for big-endian)
As discussed in PR39016:
https://bugs.llvm.org/show_bug.cgi?id=39016
...the pattern may emerge during legalization, so that's we are waiting for an
insertelement to become a scalar_to_vector in the pattern matching here.
The DAG allows for fun variations that are not possible in IR. Result types for
extracts and scalar_to_vector don't necessarily match input types, so that means
we have to be a bit more careful in the transform (see code comments).
The tests show that we don't handle cases that require a shift (as we did in the
IR version). I've left that as a potential follow-up because I'm not sure if
that's a real concern at this late stage.
Differential Revision: https://reviews.llvm.org/D53201
llvm-svn: 344872
Diffstat (limited to 'llvm/test/CodeGen/X86/extract-insert.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/extract-insert.ll | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/X86/extract-insert.ll b/llvm/test/CodeGen/X86/extract-insert.ll index 2393e32ebf6..be5f9ed24fb 100644 --- a/llvm/test/CodeGen/X86/extract-insert.ll +++ b/llvm/test/CodeGen/X86/extract-insert.ll @@ -68,8 +68,8 @@ define i32 @trunc_i64_to_i32_le(i64 %x) { ; ; X64-LABEL: trunc_i64_to_i32_le: ; X64: # %bb.0: -; X64-NEXT: movq %rdi, %xmm0 -; X64-NEXT: movd %xmm0, %eax +; X64-NEXT: movq %rdi, %rax +; X64-NEXT: # kill: def $eax killed $eax killed $rax ; X64-NEXT: retq %ins = insertelement <2 x i64> undef, i64 %x, i32 0 %bc = bitcast <2 x i64> %ins to <4 x i32> @@ -86,9 +86,8 @@ define i16 @trunc_i64_to_i16_le(i64 %x) { ; ; X64-LABEL: trunc_i64_to_i16_le: ; X64: # %bb.0: -; X64-NEXT: movq %rdi, %xmm0 -; X64-NEXT: movd %xmm0, %eax -; X64-NEXT: # kill: def $ax killed $ax killed $eax +; X64-NEXT: movq %rdi, %rax +; X64-NEXT: # kill: def $ax killed $ax killed $rax ; X64-NEXT: retq %ins = insertelement <2 x i64> undef, i64 %x, i32 0 %bc = bitcast <2 x i64> %ins to <8 x i16> |
