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author | Sanjay Patel <spatel@rotateright.com> | 2018-12-14 19:15:54 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2018-12-14 19:15:54 +0000 |
commit | 7b776863acdb6a1b327177dd330acad4bbb014ed (patch) | |
tree | 7b38ce557e62fbfa4b4b1d78801c1a2bd711910e /llvm/test/CodeGen/X86/extract-fp.ll | |
parent | f60c63c090114a6b5f0ba0a7aacd67e6c92920e7 (diff) | |
download | bcm5719-llvm-7b776863acdb6a1b327177dd330acad4bbb014ed.tar.gz bcm5719-llvm-7b776863acdb6a1b327177dd330acad4bbb014ed.zip |
[x86] add tests for extractelement of FP binops; NFC
llvm-svn: 349179
Diffstat (limited to 'llvm/test/CodeGen/X86/extract-fp.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/extract-fp.ll | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/extract-fp.ll b/llvm/test/CodeGen/X86/extract-fp.ll new file mode 100644 index 00000000000..f72764c044c --- /dev/null +++ b/llvm/test/CodeGen/X86/extract-fp.ll @@ -0,0 +1,85 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s + +define float @ext_fadd_v4f32(<4 x float> %x) { +; CHECK-LABEL: ext_fadd_v4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: addps {{.*}}(%rip), %xmm0 +; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1] +; CHECK-NEXT: retq + %bo = fadd <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 42.0> + %ext = extractelement <4 x float> %bo, i32 2 + ret float %ext +} + +define float @ext_fsub_v4f32(<4 x float> %x) { +; CHECK-LABEL: ext_fsub_v4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: movaps {{.*#+}} xmm1 = <u,2.0E+0,u,u> +; CHECK-NEXT: subps %xmm0, %xmm1 +; CHECK-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3] +; CHECK-NEXT: movaps %xmm1, %xmm0 +; CHECK-NEXT: retq + %bo = fsub <4 x float> <float 1.0, float 2.0, float 3.0, float 42.0>, %x + %ext = extractelement <4 x float> %bo, i32 1 + ret float %ext +} + +define float @ext_fmul_v4f32(<4 x float> %x) { +; CHECK-LABEL: ext_fmul_v4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0 +; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3] +; CHECK-NEXT: retq + %bo = fmul <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 42.0> + %ext = extractelement <4 x float> %bo, i32 3 + ret float %ext +} + +define float @ext_fdiv_v4f32(<4 x float> %x) { +; CHECK-LABEL: ext_fdiv_v4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; CHECK-NEXT: divps %xmm1, %xmm0 +; CHECK-NEXT: retq + %bo = fdiv <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 42.0> + %ext = extractelement <4 x float> %bo, i32 0 + ret float %ext +} + +define float @ext_fdiv_v4f32_constant_op0(<4 x float> %x) { +; CHECK-LABEL: ext_fdiv_v4f32_constant_op0: +; CHECK: # %bb.0: +; CHECK-NEXT: movaps {{.*#+}} xmm1 = <u,2.0E+0,u,u> +; CHECK-NEXT: divps %xmm0, %xmm1 +; CHECK-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3] +; CHECK-NEXT: movaps %xmm1, %xmm0 +; CHECK-NEXT: retq + %bo = fdiv <4 x float> <float 1.0, float 2.0, float 3.0, float 42.0>, %x + %ext = extractelement <4 x float> %bo, i32 1 + ret float %ext +} + +define float @ext_frem_v4f32(<4 x float> %x) { +; CHECK-LABEL: ext_frem_v4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1] +; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; CHECK-NEXT: jmp fmodf # TAILCALL + %bo = frem <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 42.0> + %ext = extractelement <4 x float> %bo, i32 2 + ret float %ext +} + +define float @ext_frem_v4f32_constant_op0(<4 x float> %x) { +; CHECK-LABEL: ext_frem_v4f32_constant_op0: +; CHECK: # %bb.0: +; CHECK-NEXT: movaps %xmm0, %xmm1 +; CHECK-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[2,3] +; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; CHECK-NEXT: jmp fmodf # TAILCALL + %bo = frem <4 x float> <float 1.0, float 2.0, float 3.0, float 42.0>, %x + %ext = extractelement <4 x float> %bo, i32 1 + ret float %ext +} + |