[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794

1 files changed, 3 insertions, 3 deletions

diff --git a/llvm/test/CodeGen/X86/div8.ll b/llvm/test/CodeGen/X86/div8.ll
index 0825f79e324..f4f50e5a494 100644
--- a/llvm/test/CodeGen/X86/div8.ll
+++ b/llvm/test/CodeGen/X86/div8.ll
@@ -10,13 +10,13 @@ entry:
   %quotient = alloca i8, align 1
   store i8 %dividend, i8* %dividend.addr, align 2
   store i8 %divisor, i8* %divisor.addr, align 1
-  %tmp = load i8* %dividend.addr, align 2
-  %tmp1 = load i8* %divisor.addr, align 1
+  %tmp = load i8, i8* %dividend.addr, align 2
+  %tmp1 = load i8, i8* %divisor.addr, align 1
 ; Insist on i8->i32 zero extension, even though divb demands only i16:
 ; CHECK: movzbl {{.*}}%eax
 ; CHECK: divb
   %div = udiv i8 %tmp, %tmp1
   store i8 %div, i8* %quotient, align 1
-  %tmp4 = load i8* %quotient, align 1
+  %tmp4 = load i8, i8* %quotient, align 1
   ret i8 %tmp4
 }