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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/X86/dbg-combine.ll | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/X86/dbg-combine.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/dbg-combine.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/dbg-combine.ll b/llvm/test/CodeGen/X86/dbg-combine.ll index dcdbfc4d44c..e443408f282 100644 --- a/llvm/test/CodeGen/X86/dbg-combine.ll +++ b/llvm/test/CodeGen/X86/dbg-combine.ll @@ -31,7 +31,7 @@ entry: %cleanup.dest.slot = alloca i32 call void @llvm.dbg.declare(metadata i32* %elems, metadata !12, metadata !13), !dbg !14 store i32 3, i32* %elems, align 4, !dbg !14 - %0 = load i32* %elems, align 4, !dbg !15 + %0 = load i32, i32* %elems, align 4, !dbg !15 %1 = zext i32 %0 to i64, !dbg !16 %2 = call i8* @llvm.stacksave(), !dbg !16 store i8* %2, i8** %saved_stack, !dbg !16 @@ -43,16 +43,16 @@ entry: store i32 1, i32* %arrayidx1, align 4, !dbg !26 %arrayidx2 = getelementptr inbounds i32, i32* %vla, i64 2, !dbg !27 store i32 2, i32* %arrayidx2, align 4, !dbg !28 - %3 = load i32* %elems, align 4, !dbg !29 + %3 = load i32, i32* %elems, align 4, !dbg !29 %4 = zext i32 %3 to i64, !dbg !30 %vla3 = alloca i32, i64 %4, align 16, !dbg !30 call void @llvm.dbg.declare(metadata i32* %vla3, metadata !31, metadata !21), !dbg !32 %arrayidx4 = getelementptr inbounds i32, i32* %vla3, i64 0, !dbg !33 store i32 1, i32* %arrayidx4, align 4, !dbg !34 %arrayidx5 = getelementptr inbounds i32, i32* %vla3, i64 0, !dbg !35 - %5 = load i32* %arrayidx5, align 4, !dbg !35 + %5 = load i32, i32* %arrayidx5, align 4, !dbg !35 store i32 1, i32* %cleanup.dest.slot - %6 = load i8** %saved_stack, !dbg !36 + %6 = load i8*, i8** %saved_stack, !dbg !36 call void @llvm.stackrestore(i8* %6), !dbg !36 ret i32 %5, !dbg !36 } |
