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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-09-19 18:11:34 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-09-19 18:11:34 +0000 |
| commit | 8191d63c3bb4fb20afdc30a0681c072d18b6dcfc (patch) | |
| tree | ec9eb082cccbaf28a3b94fa2023ac1f6c9a214ae /llvm/test/CodeGen/X86/dagcombine-cse.ll | |
| parent | 8306f76e56329f4efc02399cb11158ecabb54c17 (diff) | |
| download | bcm5719-llvm-8191d63c3bb4fb20afdc30a0681c072d18b6dcfc.tar.gz bcm5719-llvm-8191d63c3bb4fb20afdc30a0681c072d18b6dcfc.zip | |
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
This patch adds an initial x86 SimplifyDemandedVectorEltsForTargetNode implementation to handle target shuffles.
Currently the patch only decodes a target shuffle, calls SimplifyDemandedVectorElts on its input operands and removes any shuffle that reduces to undef/zero/identity.
Future work will need to integrate this with combineX86ShufflesRecursively, add support for other x86 ops, etc.
NOTE: There is a minor regression that appears to be affecting further (extractelement?) combines which I haven't been able to solve yet - possibly something to do with how nodes are added to the worklist after simplification.
Differential Revision: https://reviews.llvm.org/D52140
llvm-svn: 342564
Diffstat (limited to 'llvm/test/CodeGen/X86/dagcombine-cse.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/dagcombine-cse.ll | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/dagcombine-cse.ll b/llvm/test/CodeGen/X86/dagcombine-cse.ll index 263ce1e4d34..778040a888f 100644 --- a/llvm/test/CodeGen/X86/dagcombine-cse.ll +++ b/llvm/test/CodeGen/X86/dagcombine-cse.ll @@ -9,10 +9,7 @@ define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) n ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: imull {{[0-9]+}}(%esp), %ecx ; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: movzwl 4(%eax,%ecx), %edx ; X32-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: movd %edx, %xmm1 -; X32-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; X32-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,1,2,4,5,6,7] ; X32-NEXT: movd %xmm0, %eax ; X32-NEXT: retl @@ -31,7 +28,6 @@ define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) n ; X64-NEXT: shlq $32, %rcx ; X64-NEXT: orq %rax, %rcx ; X64-NEXT: movq %rcx, %xmm0 -; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,1,2,4,5,6,7] ; X64-NEXT: movd %xmm0, %eax ; X64-NEXT: retq entry: |
