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| author | Martin Storsjo <martin@martin.st> | 2017-11-28 08:07:18 +0000 |
|---|---|---|
| committer | Martin Storsjo <martin@martin.st> | 2017-11-28 08:07:18 +0000 |
| commit | 04b68446eb13920e672d5a21acfeec51583521bf (patch) | |
| tree | 9cc69abffe1546ca86321d1d7ac930b979030071 /llvm/test/CodeGen/X86/constructor.ll | |
| parent | cf9b1b24ce6690bbb83ecbdec69096fe840b92b1 (diff) | |
| download | bcm5719-llvm-04b68446eb13920e672d5a21acfeec51583521bf.tar.gz bcm5719-llvm-04b68446eb13920e672d5a21acfeec51583521bf.zip | |
[COFF] Implement constructor priorities
The priorities in the section name suffixes are zero padded,
allowing the linker to just do a lexical sort.
Add zero padding for .ctors sections in ELF as well.
Differential Revision: https://reviews.llvm.org/D40407
llvm-svn: 319150
Diffstat (limited to 'llvm/test/CodeGen/X86/constructor.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/constructor.ll | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/constructor.ll b/llvm/test/CodeGen/X86/constructor.ll index be12c016cce..d4518f19b7e 100644 --- a/llvm/test/CodeGen/X86/constructor.ll +++ b/llvm/test/CodeGen/X86/constructor.ll @@ -7,7 +7,8 @@ ; RUN: llc -mtriple x86_64-unknown-nacl < %s | FileCheck --check-prefix=NACL %s ; RUN: llc -mtriple i586-intel-elfiamcu -use-ctors < %s | FileCheck %s --check-prefix=MCU-CTORS ; RUN: llc -mtriple i586-intel-elfiamcu < %s | FileCheck %s --check-prefix=MCU-INIT-ARRAY -@llvm.global_ctors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @f, i8* null}, { i32, void ()*, i8* } { i32 15, void ()* @g, i8* @v }] +; RUN: llc -mtriple x86_64-win32-gnu < %s | FileCheck --check-prefix=COFF-CTOR %s +@llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @f, i8* null}, { i32, void ()*, i8* } { i32 15, void ()* @g, i8* @v }, { i32, void ()*, i8* } { i32 55555, void ()* @h, i8* @v }] @v = weak_odr global i8 0 @@ -21,9 +22,17 @@ entry: ret void } +define void @h() { +entry: + ret void +} + ; CTOR: .section .ctors.65520,"aGw",@progbits,v,comdat ; CTOR-NEXT: .p2align 3 ; CTOR-NEXT: .quad g +; CTOR-NEXT: .section .ctors.09980,"aGw",@progbits,v,comdat +; CTOR-NEXT: .p2align 3 +; CTOR-NEXT: .quad h ; CTOR-NEXT: .section .ctors,"aw",@progbits ; CTOR-NEXT: .p2align 3 ; CTOR-NEXT: .quad f @@ -31,6 +40,9 @@ entry: ; INIT-ARRAY: .section .init_array.15,"aGw",@init_array,v,comdat ; INIT-ARRAY-NEXT: .p2align 3 ; INIT-ARRAY-NEXT: .quad g +; INIT-ARRAY-NEXT: .section .init_array.55555,"aGw",@init_array,v,comdat +; INIT-ARRAY-NEXT: .p2align 3 +; INIT-ARRAY-NEXT: .quad h ; INIT-ARRAY-NEXT: .section .init_array,"aw",@init_array ; INIT-ARRAY-NEXT: .p2align 3 ; INIT-ARRAY-NEXT: .quad f @@ -38,9 +50,22 @@ entry: ; NACL: .section .init_array.15,"aGw",@init_array,v,comdat ; NACL-NEXT: .p2align 2 ; NACL-NEXT: .long g +; NACL-NEXT: .section .init_array.55555,"aGw",@init_array,v,comdat +; NACL-NEXT: .p2align 2 +; NACL-NEXT: .long h ; NACL-NEXT: .section .init_array,"aw",@init_array ; NACL-NEXT: .p2align 2 ; NACL-NEXT: .long f ; MCU-CTORS: .section .ctors,"aw",@progbits ; MCU-INIT-ARRAY: .section .init_array,"aw",@init_array + +; COFF-CTOR: .section .ctors.65520,"dw",associative,v +; COFF-CTOR-NEXT: .p2align 3 +; COFF-CTOR-NEXT: .quad g +; COFF-CTOR-NEXT: .section .ctors.09980,"dw",associative,v +; COFF-CTOR-NEXT: .p2align 3 +; COFF-CTOR-NEXT: .quad h +; COFF-CTOR-NEXT: .section .ctors,"dw" +; COFF-CTOR-NEXT: .p2align 3 +; COFF-CTOR-NEXT: .quad f |
