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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-17 18:43:43 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-17 18:43:43 +0000 |
| commit | 9274f17a5ec5869e944d77b9f9c81c5f8063f360 (patch) | |
| tree | 687a7d88d1942bb53dffd91c2586706414f991dd /llvm/test/CodeGen/X86/combine-sdiv.ll | |
| parent | 077a0aff164a651ac439a035571dfe6af85f0221 (diff) | |
| download | bcm5719-llvm-9274f17a5ec5869e944d77b9f9c81c5f8063f360.tar.gz bcm5719-llvm-9274f17a5ec5869e944d77b9f9c81c5f8063f360.zip | |
[TargetLowering] Add DemandedElts mask to SimplifyDemandedBits (PR40000)
This is an initial patch to add the necessary support for a DemandedElts argument to SimplifyDemandedBits, more closely matching computeKnownBits and to help improve vector codegen.
I've added only a small amount of the changes necessary to get at least one test to update - a lot more can be done but I'd like to add these methodically with proper test coverage, at the same time the hope is to slowly move some/all of SimplifyDemandedVectorElts into SimplifyDemandedBits as well.
Differential Revision: https://reviews.llvm.org/D55768
llvm-svn: 349374
Diffstat (limited to 'llvm/test/CodeGen/X86/combine-sdiv.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/combine-sdiv.ll | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/X86/combine-sdiv.ll b/llvm/test/CodeGen/X86/combine-sdiv.ll index f8c1c904593..a82563cc826 100644 --- a/llvm/test/CodeGen/X86/combine-sdiv.ll +++ b/llvm/test/CodeGen/X86/combine-sdiv.ll @@ -3002,7 +3002,6 @@ define <16 x i8> @pr38658(<16 x i8> %x) { ; SSE2-NEXT: packuswb %xmm0, %xmm2 ; SSE2-NEXT: psrlw $7, %xmm1 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 ; SSE2-NEXT: paddb %xmm2, %xmm1 ; SSE2-NEXT: movdqa %xmm1, %xmm0 ; SSE2-NEXT: retq @@ -3033,7 +3032,6 @@ define <16 x i8> @pr38658(<16 x i8> %x) { ; SSE41-NEXT: packuswb %xmm1, %xmm2 ; SSE41-NEXT: psrlw $7, %xmm0 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm0 ; SSE41-NEXT: paddb %xmm2, %xmm0 ; SSE41-NEXT: retq ; @@ -3059,7 +3057,6 @@ define <16 x i8> @pr38658(<16 x i8> %x) { ; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 ; AVX1-NEXT: vpsrlw $7, %xmm0, %xmm0 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 -; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ; AVX1-NEXT: vpaddb %xmm0, %xmm1, %xmm0 ; AVX1-NEXT: retq ; @@ -3078,7 +3075,6 @@ define <16 x i8> @pr38658(<16 x i8> %x) { ; AVX2-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 ; AVX2-NEXT: vpsrlw $7, %xmm0, %xmm0 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 -; AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ; AVX2-NEXT: vpaddb %xmm0, %xmm1, %xmm0 ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq @@ -3093,7 +3089,6 @@ define <16 x i8> @pr38658(<16 x i8> %x) { ; AVX512F-NEXT: vpaddb %xmm0, %xmm1, %xmm0 ; AVX512F-NEXT: vpsrlw $7, %xmm0, %xmm1 ; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0 ; AVX512F-NEXT: vpsravd {{.*}}(%rip), %zmm0, %zmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 @@ -3110,7 +3105,6 @@ define <16 x i8> @pr38658(<16 x i8> %x) { ; AVX512BW-NEXT: vpaddb %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: vpsrlw $7, %xmm0, %xmm1 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; AVX512BW-NEXT: vpmovsxbw %xmm0, %ymm0 ; AVX512BW-NEXT: vpsravw {{.*}}(%rip), %ymm0, %ymm0 ; AVX512BW-NEXT: vpmovwb %ymm0, %xmm0 |
