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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-14 12:34:31 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-14 12:34:31 +0000 |
commit | cfa5f06dde800c9d9207199b3764405aa0afc57e (patch) | |
tree | 5a52cbf5f207c71f943f80f53363799d3b7a0d46 /llvm/test/CodeGen/X86/combine-add-ssat.ll | |
parent | 4c4c0377ca6c6d35fa60934f1624252c1e38f901 (diff) | |
download | bcm5719-llvm-cfa5f06dde800c9d9207199b3764405aa0afc57e.tar.gz bcm5719-llvm-cfa5f06dde800c9d9207199b3764405aa0afc57e.zip |
[DAGCombiner] Enable add saturation constant folding
llvm-svn: 351060
Diffstat (limited to 'llvm/test/CodeGen/X86/combine-add-ssat.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/combine-add-ssat.ll | 29 |
1 files changed, 18 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/X86/combine-add-ssat.ll b/llvm/test/CodeGen/X86/combine-add-ssat.ll index 63fde10a325..74b43180fde 100644 --- a/llvm/test/CodeGen/X86/combine-add-ssat.ll +++ b/llvm/test/CodeGen/X86/combine-add-ssat.ll @@ -16,13 +16,6 @@ define i32 @combine_constfold_i32() { ; CHECK-LABEL: combine_constfold_i32: ; CHECK: # %bb.0: ; CHECK-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF -; CHECK-NEXT: addl $100, %edx -; CHECK-NEXT: setns %cl -; CHECK-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF -; CHECK-NEXT: addl $100, %eax -; CHECK-NEXT: cmovol %ecx, %eax ; CHECK-NEXT: retq %res = call i32 @llvm.sadd.sat.i32(i32 2147483647, i32 100) ret i32 %res @@ -31,16 +24,30 @@ define i32 @combine_constfold_i32() { define <8 x i16> @combine_constfold_v8i16() { ; SSE-LABEL: combine_constfold_v8i16: ; SSE: # %bb.0: -; SSE-NEXT: movdqa {{.*#+}} xmm0 = [0,1,255,65535,65535,65281,1,1] -; SSE-NEXT: paddsw {{.*}}(%rip), %xmm0 +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,0,256,65534,0,65280,32768,0] ; SSE-NEXT: retq ; ; AVX-LABEL: combine_constfold_v8i16: ; AVX: # %bb.0: -; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [0,1,255,65535,65535,65281,1,1] +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,0,256,65534,0,65280,32768,0] +; AVX-NEXT: retq + %res = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> <i16 0, i16 1, i16 255, i16 65535, i16 -1, i16 -255, i16 -32760, i16 1>, <8 x i16> <i16 1, i16 65535, i16 1, i16 65535, i16 1, i16 65535, i16 -10, i16 65535>) + ret <8 x i16> %res +} + +define <8 x i16> @combine_constfold_undef_v8i16() { +; SSE-LABEL: combine_constfold_undef_v8i16: +; SSE: # %bb.0: +; SSE-NEXT: movdqa {{.*#+}} xmm0 = <u,1,u,65535,65535,65281,32776,1> +; SSE-NEXT: paddsw {{.*}}(%rip), %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: combine_constfold_undef_v8i16: +; AVX: # %bb.0: +; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = <u,1,u,65535,65535,65281,32776,1> ; AVX-NEXT: vpaddsw {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: retq - %res = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> <i16 0, i16 1, i16 255, i16 65535, i16 -1, i16 -255, i16 -65535, i16 1>, <8 x i16> <i16 1, i16 65535, i16 1, i16 65535, i16 1, i16 65535, i16 1, i16 65535>) + %res = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> <i16 undef, i16 1, i16 undef, i16 65535, i16 -1, i16 -255, i16 -32760, i16 1>, <8 x i16> <i16 1, i16 undef, i16 undef, i16 65535, i16 1, i16 65535, i16 -10, i16 65535>) ret <8 x i16> %res } |