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authorHans Wennborg <hans@hanshq.net>2017-08-30 22:11:37 +0000
committerHans Wennborg <hans@hanshq.net>2017-08-30 22:11:37 +0000
commit24775a0a6ccfeae5e091b5e9990cb910913c2963 (patch)
tree1d3e32a5884e595573fc1f5d2c45060ac1358c09 /llvm/test/CodeGen/X86/buildvec-insertvec.ll
parent01d026510630203b1217a0d5550a86e6eaa05b12 (diff)
downloadbcm5719-llvm-24775a0a6ccfeae5e091b5e9990cb910913c2963.tar.gz
bcm5719-llvm-24775a0a6ccfeae5e091b5e9990cb910913c2963.zip
Revert r312154 "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding""
It caused PR34387: Assertion failed: (RegNo < NumRegs && "Attempting to access record for invalid register number!") > Issues identified by buildbots addressed since original review: > - Fixed ARMLoadStoreOptimizer bug exposed by this change in r311907. > - The pass no longer forwards COPYs to physical register uses, since > doing so can break code that implicitly relies on the physical > register number of the use. > - The pass no longer forwards COPYs to undef uses, since doing so > can break the machine verifier by creating LiveRanges that don't > end on a use (since the undef operand is not considered a use). > > [MachineCopyPropagation] Extend pass to do COPY source forwarding > > This change extends MachineCopyPropagation to do COPY source forwarding. > > This change also extends the MachineCopyPropagation pass to be able to > be run during register allocation, after physical registers have been > assigned, but before the virtual registers have been re-written, which > allows it to remove virtual register COPY LiveIntervals that become dead > through the forwarding of all of their uses. llvm-svn: 312178
Diffstat (limited to 'llvm/test/CodeGen/X86/buildvec-insertvec.ll')
-rw-r--r--llvm/test/CodeGen/X86/buildvec-insertvec.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/buildvec-insertvec.ll b/llvm/test/CodeGen/X86/buildvec-insertvec.ll
index 076df3a9003..cd5abc1373b 100644
--- a/llvm/test/CodeGen/X86/buildvec-insertvec.ll
+++ b/llvm/test/CodeGen/X86/buildvec-insertvec.ll
@@ -38,7 +38,7 @@ define <4 x float> @test_negative_zero_1(<4 x float> %A) {
; SSE2-LABEL: test_negative_zero_1:
; SSE2: # BB#0: # %entry
; SSE2-NEXT: movaps %xmm0, %xmm1
-; SSE2-NEXT: movhlps {{.*#+}} xmm1 = xmm0[1],xmm1[1]
+; SSE2-NEXT: movhlps {{.*#+}} xmm1 = xmm1[1,1]
; SSE2-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; SSE2-NEXT: xorps %xmm2, %xmm2
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