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| author | Peter Collingbourne <peter@pcc.me.uk> | 2010-11-13 19:54:30 +0000 |
|---|---|---|
| committer | Peter Collingbourne <peter@pcc.me.uk> | 2010-11-13 19:54:30 +0000 |
| commit | feea10bcdf469a38a12a6e0b90af33aea3478fa8 (patch) | |
| tree | 21c575a00ed7b39b5f4d35b6fd1c0b9c3c9da68c /llvm/test/CodeGen/X86/bswap-inline-asm.ll | |
| parent | 1c6437a62a06e23376ddbbb82fd2aeddfd6e44c2 (diff) | |
| download | bcm5719-llvm-feea10bcdf469a38a12a6e0b90af33aea3478fa8.tar.gz bcm5719-llvm-feea10bcdf469a38a12a6e0b90af33aea3478fa8.zip | |
Recognise 32-bit ror-based bswap implementation used by uclibc
llvm-svn: 119007
Diffstat (limited to 'llvm/test/CodeGen/X86/bswap-inline-asm.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/bswap-inline-asm.ll | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/bswap-inline-asm.ll b/llvm/test/CodeGen/X86/bswap-inline-asm.ll index 2b7019371a1..ecb4cecf10d 100644 --- a/llvm/test/CodeGen/X86/bswap-inline-asm.ll +++ b/llvm/test/CodeGen/X86/bswap-inline-asm.ll @@ -65,6 +65,13 @@ define i32 @t32(i32 %x) nounwind { ret i32 %asmtmp } +; CHECK: u32: +; CHECK: bswapl +define i32 @u32(i32 %x) nounwind { + %asmtmp = tail call i32 asm "rorw $$8, ${0:w};rorl $$16, $0;rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind + ret i32 %asmtmp +} + ; CHECK: s64: ; CHECK: bswapq define i64 @s64(i64 %x) nounwind { |
