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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-09-19 18:59:08 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-09-19 18:59:08 +0000 |
| commit | 2d0f20cc043458c945e4959c5b130c07a7f5b8b5 (patch) | |
| tree | 4c6c2685582012433738444bea2cce36c82c7b04 /llvm/test/CodeGen/X86/bool-simplify.ll | |
| parent | 894c39f770298e8972d3518c9b3531b59c819f56 (diff) | |
| download | bcm5719-llvm-2d0f20cc043458c945e4959c5b130c07a7f5b8b5.tar.gz bcm5719-llvm-2d0f20cc043458c945e4959c5b130c07a7f5b8b5.zip | |
[X86] Handle COPYs of physregs better (regalloc hints)
Enable enableMultipleCopyHints() on X86.
Original Patch by @jonpa:
While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling.
Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates.
Differential Revision: https://reviews.llvm.org/D38128
llvm-svn: 342578
Diffstat (limited to 'llvm/test/CodeGen/X86/bool-simplify.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/bool-simplify.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/bool-simplify.ll b/llvm/test/CodeGen/X86/bool-simplify.ll index bbb7eb7c176..edc36fd8b14 100644 --- a/llvm/test/CodeGen/X86/bool-simplify.ll +++ b/llvm/test/CodeGen/X86/bool-simplify.ll @@ -4,9 +4,9 @@ define i32 @foo(<2 x i64> %c, i32 %a, i32 %b) { ; CHECK-LABEL: foo: ; CHECK: # %bb.0: -; CHECK-NEXT: ptest %xmm0, %xmm0 -; CHECK-NEXT: cmovnel %esi, %edi ; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: ptest %xmm0, %xmm0 +; CHECK-NEXT: cmovnel %esi, %eax ; CHECK-NEXT: retq %t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c) %t2 = icmp ne i32 %t1, 0 |
