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author | Craig Topper <craig.topper@intel.com> | 2018-02-13 05:33:39 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-02-13 05:33:39 +0000 |
commit | d6d731270b36e926ad17abec3c66c20c5980fa27 (patch) | |
tree | d29656ed6be4b6f87ba584832a5091f3b8bbbc9d /llvm/test/CodeGen/X86/bmi.ll | |
parent | df99baa4df985cfd9a1517b4ca79b41c179f4773 (diff) | |
download | bcm5719-llvm-d6d731270b36e926ad17abec3c66c20c5980fa27.tar.gz bcm5719-llvm-d6d731270b36e926ad17abec3c66c20c5980fa27.zip |
[X86] Add a blsr test case with a shift from PR35792. NFC
The blsr pattern here is missed because the add is shrunk, but the and is not. This leaves an any_extend between them.
llvm-svn: 324986
Diffstat (limited to 'llvm/test/CodeGen/X86/bmi.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/bmi.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll index 6b614411236..ad436435af2 100644 --- a/llvm/test/CodeGen/X86/bmi.ll +++ b/llvm/test/CodeGen/X86/bmi.ll @@ -822,3 +822,16 @@ define i64 @blsr_disguised_constant(i64 %x) { ret i64 %r } +; The add here gets shrunk, but the and does not thus hiding the blsr pattern. +define i64 @blsr_disguised_shrunk_add(i64 %x) { +; CHECK-LABEL: blsr_disguised_shrunk_add: +; CHECK: # %bb.0: +; CHECK-NEXT: shrq $48, %rdi +; CHECK-NEXT: leal -1(%rdi), %eax +; CHECK-NEXT: andq %rdi, %rax +; CHECK-NEXT: retq + %a = lshr i64 %x, 48 + %b = add i64 %a, -1 + %c = and i64 %b, %a + ret i64 %c +} |