diff options
author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-04-21 18:03:06 +0000 |
---|---|---|
committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-04-21 18:03:06 +0000 |
commit | 8d1052f55cf807afc4fb21734d36f166b83ae4ea (patch) | |
tree | 0617fb1baba1f867f534338ec0c90ed46d02c1e5 /llvm/test/CodeGen/X86/bmi.ll | |
parent | a98c7ead306647142fd954f64cc9d5184a17fd28 (diff) | |
download | bcm5719-llvm-8d1052f55cf807afc4fb21734d36f166b83ae4ea.tar.gz bcm5719-llvm-8d1052f55cf807afc4fb21734d36f166b83ae4ea.zip |
DAGCombiner: Reduce 64-bit BFE pattern to pattern on 32-bit component
If the extracted bits are restricted to the upper half or lower half,
this can be truncated.
llvm-svn: 267024
Diffstat (limited to 'llvm/test/CodeGen/X86/bmi.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/bmi.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll index cfb910eb7da..fc1ce0cdec2 100644 --- a/llvm/test/CodeGen/X86/bmi.ll +++ b/llvm/test/CodeGen/X86/bmi.ll @@ -311,7 +311,7 @@ define i64 @bextr64b(i64 %x) uwtable ssp { ; CHECK-LABEL: bextr64b: ; CHECK: # BB#0: ; CHECK-NEXT: movl $3076, %eax # imm = 0xC04 -; CHECK-NEXT: bextrq %rax, %rdi, %rax +; CHECK-NEXT: bextrl %eax, %edi, %eax ; CHECK-NEXT: retq ; %1 = lshr i64 %x, 4 @@ -323,7 +323,7 @@ define i64 @bextr64b_load(i64* %x) { ; CHECK-LABEL: bextr64b_load: ; CHECK: # BB#0: ; CHECK-NEXT: movl $3076, %eax # imm = 0xC04 -; CHECK-NEXT: bextrq %rax, (%rdi), %rax +; CHECK-NEXT: bextrl %eax, (%rdi), %eax ; CHECK-NEXT: retq ; %1 = load i64, i64* %x, align 8 |