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| author | Craig Topper <craig.topper@intel.com> | 2018-12-21 21:16:26 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-12-21 21:16:26 +0000 |
| commit | 62ec024d3bc7a5788aa982b5b9d1ea4455598b53 (patch) | |
| tree | bdfcc9d388fc6963ecbaa7bf80684ba7ba5ac43d /llvm/test/CodeGen/X86/bmi.ll | |
| parent | d914174d9bd5ab3a5e6eb3f9ccc245df4d6fe5e6 (diff) | |
| download | bcm5719-llvm-62ec024d3bc7a5788aa982b5b9d1ea4455598b53.tar.gz bcm5719-llvm-62ec024d3bc7a5788aa982b5b9d1ea4455598b53.zip | |
[X86] Don't allow optimizeCompareInstr to replace a CMP with BEXTR if the sign flag is used.
The BEXTR instruction documents the SF bit as undefined.
The TBM BEXTR instruction has the same issue, but I'm not sure how to test it. With the control being an immediate we can determine the sign bit is 0 or the BEXTR would have been removed.
Fixes PR40060
Differential Revision: https://reviews.llvm.org/D55807
llvm-svn: 349956
Diffstat (limited to 'llvm/test/CodeGen/X86/bmi.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/bmi.ll | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll index 03d6df03c31..ee7cf5f6bc6 100644 --- a/llvm/test/CodeGen/X86/bmi.ll +++ b/llvm/test/CodeGen/X86/bmi.ll @@ -1032,6 +1032,7 @@ define void @pr40060(i32, i32) { ; X86: # %bb.0: ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax +; X86-NEXT: testl %eax, %eax ; X86-NEXT: js .LBB45_1 ; X86-NEXT: # %bb.2: ; X86-NEXT: jmp bar # TAILCALL @@ -1041,6 +1042,7 @@ define void @pr40060(i32, i32) { ; X64-LABEL: pr40060: ; X64: # %bb.0: ; X64-NEXT: bextrl %esi, %edi, %eax +; X64-NEXT: testl %eax, %eax ; X64-NEXT: js .LBB45_1 ; X64-NEXT: # %bb.2: ; X64-NEXT: jmp bar # TAILCALL |
