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authorZvi Rackover <zvi.rackover@intel.com>2018-01-09 16:26:06 +0000
committerZvi Rackover <zvi.rackover@intel.com>2018-01-09 16:26:06 +0000
commit72b0bb1405f3c32acfe14c4c2648c851262ad45e (patch)
treeae236fb36e3914f7f547ec3e5b531df219c062db /llvm/test/CodeGen/X86/avx512-trunc.ll
parentb11e84c1d8e4c11ff653279464ff84f947094986 (diff)
downloadbcm5719-llvm-72b0bb1405f3c32acfe14c4c2648c851262ad45e.tar.gz
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X86 Tests: Update more isel tests with FastVariableShuffle feature
Summary: Added the FastVariableShuffle feature to cases that resembled processors for which this fearure is on. For AVX2 there are processors with and w/o this fearue enable. For AVX512 only KNL does enable this feature so cases which only have +avx512f were left without the FastVariableShuffle enabled. Reviewers: RKSimon, craig.topper Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41851 llvm-svn: 322090
Diffstat (limited to 'llvm/test/CodeGen/X86/avx512-trunc.ll')
-rw-r--r--llvm/test/CodeGen/X86/avx512-trunc.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/avx512-trunc.ll b/llvm/test/CodeGen/X86/avx512-trunc.ll
index d40c899b495..052e9035685 100644
--- a/llvm/test/CodeGen/X86/avx512-trunc.ll
+++ b/llvm/test/CodeGen/X86/avx512-trunc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=SKX
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq,+fast-variable-shuffle | FileCheck %s --check-prefixes=ALL,SKX
attributes #0 = { nounwind }
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