[X86] Extract PSIGN/BLENDVP tests into vector-blend.ll. NFC.

We're going to stop generating PSIGN, so calling a test "psign"
isn't ideal. Instead, call these tests what they really are:
variable blends using logic.
Also add a test to exhibit a case we're currently missing in
the PSIGN combine.

llvm-svn: 261022

1 files changed, 0 insertions, 29 deletions

diff --git a/llvm/test/CodeGen/X86/avx2-logic.ll b/llvm/test/CodeGen/X86/avx2-logic.ll
index 3d4fcec6078..e187933f66b 100644
--- a/llvm/test/CodeGen/X86/avx2-logic.ll
+++ b/llvm/test/CodeGen/X86/avx2-logic.ll
@@ -53,35 +53,6 @@ define <32 x i8> @vpblendvb(<32 x i1> %cond, <32 x i8> %x, <32 x i8> %y) {
   ret <32 x i8> %min
 }
 
-define <8 x i32> @signd(<8 x i32> %a, <8 x i32> %b) nounwind {
-entry:
-; CHECK-LABEL: signd:
-; CHECK: psignd
-; CHECK-NOT: sub
-; CHECK: ret
-  %b.lobit = ashr <8 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
-  %sub = sub nsw <8 x i32> zeroinitializer, %a
-  %0 = xor <8 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
-  %1 = and <8 x i32> %a, %0
-  %2 = and <8 x i32> %b.lobit, %sub
-  %cond = or <8 x i32> %1, %2
-  ret <8 x i32> %cond
-}
-
-define <8 x i32> @blendvb(<8 x i32> %b, <8 x i32> %a, <8 x i32> %c) nounwind {
-entry:
-; CHECK-LABEL: blendvb:
-; CHECK: pblendvb
-; CHECK: ret
-  %b.lobit = ashr <8 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
-  %sub = sub nsw <8 x i32> zeroinitializer, %a
-  %0 = xor <8 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
-  %1 = and <8 x i32> %c, %0
-  %2 = and <8 x i32> %a, %b.lobit
-  %cond = or <8 x i32> %1, %2
-  ret <8 x i32> %cond
-}
-
 define <8 x i32> @allOnes() nounwind {
 ; CHECK: vpcmpeqd
 ; CHECK-NOT: vinsert