summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
diff options
context:
space:
mode:
authorUriel Korach <uriel.korach@intel.com>2017-09-13 09:02:36 +0000
committerUriel Korach <uriel.korach@intel.com>2017-09-13 09:02:36 +0000
commit5d5da5f5315d564a14ccb8b050b24d3a6488f0da (patch)
tree4c92bcc5144bbd836cf63ad81d630783f9a5081e /llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
parent3fba3c3b0c14be30ae4d7b7159a0617e07ad890e (diff)
downloadbcm5719-llvm-5d5da5f5315d564a14ccb8b050b24d3a6488f0da.tar.gz
bcm5719-llvm-5d5da5f5315d564a14ccb8b050b24d3a6488f0da.zip
[X86] [PATCH] [intrinsics] Lowering X86 ABS intrinsics to IR. (llvm)
This patch, together with a matching clang patch (https://reviews.llvm.org/D37694), implements the lowering of X86 ABS intrinsics to IR. differential revision: https://reviews.llvm.org/D37693. llvm-svn: 313134
Diffstat (limited to 'llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll')
-rw-r--r--llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll18
1 files changed, 12 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
index dae973052ed..837ae28f051 100644
--- a/llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
@@ -15,8 +15,10 @@ define <4 x i64> @test_mm256_abs_epi8(<4 x i64> %a0) {
; X64-NEXT: vpabsb %ymm0, %ymm0
; X64-NEXT: retq
%arg = bitcast <4 x i64> %a0 to <32 x i8>
- %call = call <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8> %arg)
- %res = bitcast <32 x i8> %call to <4 x i64>
+ %sub = sub <32 x i8> zeroinitializer, %arg
+ %cmp = icmp sgt <32 x i8> %arg, zeroinitializer
+ %sel = select <32 x i1> %cmp, <32 x i8> %arg, <32 x i8> %sub
+ %res = bitcast <32 x i8> %sel to <4 x i64>
ret <4 x i64> %res
}
declare <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8>) nounwind readnone
@@ -32,8 +34,10 @@ define <4 x i64> @test_mm256_abs_epi16(<4 x i64> %a0) {
; X64-NEXT: vpabsw %ymm0, %ymm0
; X64-NEXT: retq
%arg = bitcast <4 x i64> %a0 to <16 x i16>
- %call = call <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16> %arg)
- %res = bitcast <16 x i16> %call to <4 x i64>
+ %sub = sub <16 x i16> zeroinitializer, %arg
+ %cmp = icmp sgt <16 x i16> %arg, zeroinitializer
+ %sel = select <16 x i1> %cmp, <16 x i16> %arg, <16 x i16> %sub
+ %res = bitcast <16 x i16> %sel to <4 x i64>
ret <4 x i64> %res
}
declare <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16>) nounwind readnone
@@ -49,8 +53,10 @@ define <4 x i64> @test_mm256_abs_epi32(<4 x i64> %a0) {
; X64-NEXT: vpabsd %ymm0, %ymm0
; X64-NEXT: retq
%arg = bitcast <4 x i64> %a0 to <8 x i32>
- %call = call <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32> %arg)
- %res = bitcast <8 x i32> %call to <4 x i64>
+ %sub = sub <8 x i32> zeroinitializer, %arg
+ %cmp = icmp sgt <8 x i32> %arg, zeroinitializer
+ %sel = select <8 x i1> %cmp, <8 x i32> %arg, <8 x i32> %sub
+ %res = bitcast <8 x i32> %sel to <4 x i64>
ret <4 x i64> %res
}
declare <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32>) nounwind readnone
OpenPOWER on IntegriCloud