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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-09-12 19:30:40 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-09-12 19:30:40 +0000
commitbe7a086f5826363c0f541dba247897a3523b8355 (patch)
tree9580e5b0fb7a03cd494c05e674fc39131fe84d79 /llvm/test/CodeGen/X86/avx-blend.ll
parentf6382979f28b20170c7ec9f0778952de29126cfc (diff)
downloadbcm5719-llvm-be7a086f5826363c0f541dba247897a3523b8355.tar.gz
bcm5719-llvm-be7a086f5826363c0f541dba247897a3523b8355.zip
Not sure how CMPPS and CMPPD had already ever worked, I guess it didn't.
However with this fix it does now. Basically the operand order for the x86 target specific node is not the same as the instruction, but since the intrinsic need that specific order at the instruction definition, just change the order during legalization. Also, there were some wrong invertions of condition codes, such as GE => LE, GT => LT, fix that too. Fix PR10907. llvm-svn: 139528
Diffstat (limited to 'llvm/test/CodeGen/X86/avx-blend.ll')
-rw-r--r--llvm/test/CodeGen/X86/avx-blend.ll19
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/avx-blend.ll b/llvm/test/CodeGen/X86/avx-blend.ll
index e025e26bde9..e3008d9e165 100644
--- a/llvm/test/CodeGen/X86/avx-blend.ll
+++ b/llvm/test/CodeGen/X86/avx-blend.ll
@@ -82,4 +82,23 @@ define <8 x i64> @vsel_i648(<8 x i64> %v1, <8 x i64> %v2) {
ret <8 x i64> %vsel
}
+;; TEST blend + compares
+; CHECK: A
+define <2 x double> @A(<2 x double> %x, <2 x double> %y) {
+ ; CHECK: vcmpltpd
+ ; CHECK: vblendvpd
+ %max_is_x = fcmp oge <2 x double> %x, %y
+ %max = select <2 x i1> %max_is_x, <2 x double> %x, <2 x double> %y
+ ret <2 x double> %max
+}
+
+; CHECK: B
+define <2 x double> @B(<2 x double> %x, <2 x double> %y) {
+ ; CHECK: vcmplepd
+ ; CHECK: vblendvpd
+ %max_is_x = fcmp ogt <2 x double> %x, %y
+ %max = select <2 x i1> %max_is_x, <2 x double> %x, <2 x double> %y
+ ret <2 x double> %max
+}
+
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