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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-04-26 01:03:22 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-04-26 01:03:22 +0000 |
| commit | 8cc9059ce8f3bd25fd61b0cf6936295c80518bf3 (patch) | |
| tree | 8014fcc78e10c00ac649be3033b6f00c2d1a31cf /llvm/test/CodeGen/X86/avoid_complex_am.ll | |
| parent | 8d039e442036436c004d7b43333efe29d4386293 (diff) | |
| download | bcm5719-llvm-8cc9059ce8f3bd25fd61b0cf6936295c80518bf3.tar.gz bcm5719-llvm-8cc9059ce8f3bd25fd61b0cf6936295c80518bf3.zip | |
[InstCombine][X86] Teach how to fold calls to SSE2/AVX2 packed logical shift
right intrinsics.
A packed logical shift right with a shift count bigger than or equal to the
element size always produces a zero vector. In all other cases, it can be
safely replaced by a 'lshr' instruction.
llvm-svn: 207299
Diffstat (limited to 'llvm/test/CodeGen/X86/avoid_complex_am.ll')
0 files changed, 0 insertions, 0 deletions
