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| author | Tim Northover <tnorthover@apple.com> | 2014-03-11 10:48:52 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-03-11 10:48:52 +0000 |
| commit | e94a518a22db4b21f4a4a9e34173a11e9dfc5fcc (patch) | |
| tree | 054bf7c2cdd888931fdabadb91d82dbb78b05f2b /llvm/test/CodeGen/X86/atomic6432.ll | |
| parent | aab3cfe023752c32da984afb281d322d631ad298 (diff) | |
| download | bcm5719-llvm-e94a518a22db4b21f4a4a9e34173a11e9dfc5fcc.tar.gz bcm5719-llvm-e94a518a22db4b21f4a4a9e34173a11e9dfc5fcc.zip | |
IR: add a second ordering operand to cmpxhg for failure
The syntax for "cmpxchg" should now look something like:
cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic
where the second ordering argument gives the required semantics in the case
that no exchange takes place. It should be no stronger than the first ordering
constraint and cannot be either "release" or "acq_rel" (since no store will
have taken place).
rdar://problem/15996804
llvm-svn: 203559
Diffstat (limited to 'llvm/test/CodeGen/X86/atomic6432.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/atomic6432.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/atomic6432.ll b/llvm/test/CodeGen/X86/atomic6432.ll index 31e66c876e3..c0f7267abe7 100644 --- a/llvm/test/CodeGen/X86/atomic6432.ll +++ b/llvm/test/CodeGen/X86/atomic6432.ll @@ -184,7 +184,7 @@ define void @atomic_fetch_umin64(i64 %x) nounwind { } define void @atomic_fetch_cmpxchg64() nounwind { - %t1 = cmpxchg i64* @sc64, i64 0, i64 1 acquire + %t1 = cmpxchg i64* @sc64, i64 0, i64 1 acquire acquire ; X32: lock ; X32: cmpxchg8b ret void |
