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| author | Evan Cheng <evan.cheng@apple.com> | 2010-01-11 22:03:29 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-01-11 22:03:29 +0000 |
| commit | 99789a7a76de9675f0abe5c87c35887b40274ab6 (patch) | |
| tree | 9b96435cdca2cd42ac520ba65cccc46a6d0644aa /llvm/test/CodeGen/X86/3addr-or.ll | |
| parent | 7419ce72aee24860364c2e60944ebe8b6fecccb0 (diff) | |
| download | bcm5719-llvm-99789a7a76de9675f0abe5c87c35887b40274ab6.tar.gz bcm5719-llvm-99789a7a76de9675f0abe5c87c35887b40274ab6.zip | |
Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead.
llvm-svn: 93191
Diffstat (limited to 'llvm/test/CodeGen/X86/3addr-or.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/3addr-or.ll | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/3addr-or.ll b/llvm/test/CodeGen/X86/3addr-or.ll index 395ba46aab3..30a1f36850d 100644 --- a/llvm/test/CodeGen/X86/3addr-or.ll +++ b/llvm/test/CodeGen/X86/3addr-or.ll @@ -9,3 +9,19 @@ entry: %1 = or i32 %0, 3 ; <i32> [#uses=1] ret i32 %1 } + +define i64 @test2(i8 %A, i8 %B) nounwind { +; CHECK: test2: +; CHECK: shrq $4 +; CHECK-NOT: movq +; CHECK-NOT: orq +; CHECK: leaq +; CHECK: ret + %C = zext i8 %A to i64 ; <i64> [#uses=1] + %D = shl i64 %C, 4 ; <i64> [#uses=1] + %E = and i64 %D, 48 ; <i64> [#uses=1] + %F = zext i8 %B to i64 ; <i64> [#uses=1] + %G = lshr i64 %F, 4 ; <i64> [#uses=1] + %H = or i64 %G, %E ; <i64> [#uses=1] + ret i64 %H +} |
