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| author | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
| commit | a5b9645c4b7a1d8be5e41081b99f27b49b8aa8cf (patch) | |
| tree | 7f5a9f6633be0c4e77a1bb00e5bfcfcca14e219b /llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll | |
| parent | 72a4d2fec138ad6d2becbc69c6d034246a056d09 (diff) | |
| download | bcm5719-llvm-a5b9645c4b7a1d8be5e41081b99f27b49b8aa8cf.tar.gz bcm5719-llvm-a5b9645c4b7a1d8be5e41081b99f27b49b8aa8cf.zip | |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
llvm-svn: 72897
Diffstat (limited to 'llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll b/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll index 1e5ab99a9c8..53bb054795e 100644 --- a/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll +++ b/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll @@ -3,10 +3,10 @@ define void @t() { entry: %tmp455 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 1, i32 0, i32 3, i32 2 > ; <<4 x float>> [#uses=1] - %tmp457 = mul <4 x float> zeroinitializer, %tmp455 ; <<4 x float>> [#uses=2] + %tmp457 = fmul <4 x float> zeroinitializer, %tmp455 ; <<4 x float>> [#uses=2] %tmp461 = shufflevector <4 x float> %tmp457, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] %tmp465 = shufflevector <4 x float> %tmp457, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>> [#uses=1] - %tmp466 = sub <4 x float> %tmp461, %tmp465 ; <<4 x float>> [#uses=1] + %tmp466 = fsub <4 x float> %tmp461, %tmp465 ; <<4 x float>> [#uses=1] %tmp536 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp466, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1] %tmp542 = shufflevector <4 x float> %tmp536, <4 x float> zeroinitializer, <4 x i32> < i32 6, i32 7, i32 2, i32 3 > ; <<4 x float>> [#uses=1] %tmp580 = bitcast <4 x float> %tmp542 to <4 x i32> ; <<4 x i32>> [#uses=1] @@ -15,10 +15,10 @@ entry: %tmp592 = bitcast <4 x i32> %tmp591 to <4 x float> ; <<4 x float>> [#uses=1] %tmp609 = fdiv <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, %tmp592 ; <<4 x float>> [#uses=1] %tmp652 = shufflevector <4 x float> %tmp609, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>> [#uses=1] - %tmp662 = mul <4 x float> zeroinitializer, %tmp652 ; <<4 x float>> [#uses=1] + %tmp662 = fmul <4 x float> zeroinitializer, %tmp652 ; <<4 x float>> [#uses=1] %tmp678 = shufflevector <4 x float> %tmp662, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>> [#uses=1] - %tmp753 = mul <4 x float> zeroinitializer, %tmp678 ; <<4 x float>> [#uses=1] - %tmp754 = sub <4 x float> zeroinitializer, %tmp753 ; <<4 x float>> [#uses=1] + %tmp753 = fmul <4 x float> zeroinitializer, %tmp678 ; <<4 x float>> [#uses=1] + %tmp754 = fsub <4 x float> zeroinitializer, %tmp753 ; <<4 x float>> [#uses=1] store <4 x float> %tmp754, <4 x float>* null, align 16 unreachable } |
