[WebAssembly] Implement the rotate instructions.

llvm-svn: 264076

2 files changed, 108 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/WebAssembly/i32.ll b/llvm/test/CodeGen/WebAssembly/i32.ll
index d241b80ed3f..945a4470ed0 100644
--- a/llvm/test/CodeGen/WebAssembly/i32.ll
+++ b/llvm/test/CodeGen/WebAssembly/i32.ll
@@ -199,3 +199,57 @@ define i32 @eqz32(i32 %x) {
   %b = zext i1 %a to i32
   ret i32 %b
 }
+
+; CHECK-LABEL: rotl:
+; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: i32.rotl $push0=, $0, $1
+; CHECK-NEXT: return $pop0{{$}}
+define i32 @rotl(i32 %x, i32 %y) {
+  %z = sub i32 32, %y
+  %b = shl i32 %x, %y
+  %c = lshr i32 %x, %z
+  %d = or i32 %b, %c
+  ret i32 %d
+}
+
+; CHECK-LABEL: masked_rotl:
+; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: i32.rotl $push0=, $0, $1
+; CHECK-NEXT: return $pop0{{$}}
+define i32 @masked_rotl(i32 %x, i32 %y) {
+  %a = and i32 %y, 31
+  %z = sub i32 32, %a
+  %b = shl i32 %x, %a
+  %c = lshr i32 %x, %z
+  %d = or i32 %b, %c
+  ret i32 %d
+}
+
+; CHECK-LABEL: rotr:
+; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: i32.rotr $push0=, $0, $1
+; CHECK-NEXT: return $pop0{{$}}
+define i32 @rotr(i32 %x, i32 %y) {
+  %z = sub i32 32, %y
+  %b = lshr i32 %x, %y
+  %c = shl i32 %x, %z
+  %d = or i32 %b, %c
+  ret i32 %d
+}
+
+; CHECK-LABEL: masked_rotr:
+; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: i32.rotr $push0=, $0, $1
+; CHECK-NEXT: return $pop0{{$}}
+define i32 @masked_rotr(i32 %x, i32 %y) {
+  %a = and i32 %y, 31
+  %z = sub i32 32, %a
+  %b = lshr i32 %x, %a
+  %c = shl i32 %x, %z
+  %d = or i32 %b, %c
+  ret i32 %d
+}
diff --git a/llvm/test/CodeGen/WebAssembly/i64.ll b/llvm/test/CodeGen/WebAssembly/i64.ll
index c2a1bb6b970..85a8ae34dcb 100644
--- a/llvm/test/CodeGen/WebAssembly/i64.ll
+++ b/llvm/test/CodeGen/WebAssembly/i64.ll
@@ -199,3 +199,57 @@ define i32 @eqz64(i64 %x) {
   %b = zext i1 %a to i32
   ret i32 %b
 }
+
+; CHECK-LABEL: rotl:
+; CHECK-NEXT: .param i64, i64{{$}}
+; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: i64.rotl $push0=, $0, $1
+; CHECK-NEXT: return $pop0{{$}}
+define i64 @rotl(i64 %x, i64 %y) {
+  %z = sub i64 64, %y
+  %b = shl i64 %x, %y
+  %c = lshr i64 %x, %z
+  %d = or i64 %b, %c
+  ret i64 %d
+}
+
+; CHECK-LABEL: masked_rotl:
+; CHECK-NEXT: .param i64, i64{{$}}
+; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: i64.rotl $push0=, $0, $1
+; CHECK-NEXT: return $pop0{{$}}
+define i64 @masked_rotl(i64 %x, i64 %y) {
+  %a = and i64 %y, 63
+  %z = sub i64 64, %a
+  %b = shl i64 %x, %a
+  %c = lshr i64 %x, %z
+  %d = or i64 %b, %c
+  ret i64 %d
+}
+
+; CHECK-LABEL: rotr:
+; CHECK-NEXT: .param i64, i64{{$}}
+; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: i64.rotr $push0=, $0, $1
+; CHECK-NEXT: return $pop0{{$}}
+define i64 @rotr(i64 %x, i64 %y) {
+  %z = sub i64 64, %y
+  %b = lshr i64 %x, %y
+  %c = shl i64 %x, %z
+  %d = or i64 %b, %c
+  ret i64 %d
+}
+
+; CHECK-LABEL: masked_rotr:
+; CHECK-NEXT: .param i64, i64{{$}}
+; CHECK-NEXT: .result i64{{$}}
+; CHECK-NEXT: i64.rotr $push0=, $0, $1
+; CHECK-NEXT: return $pop0{{$}}
+define i64 @masked_rotr(i64 %x, i64 %y) {
+  %a = and i64 %y, 63
+  %z = sub i64 64, %a
+  %b = lshr i64 %x, %a
+  %c = shl i64 %x, %z
+  %d = or i64 %b, %c
+  ret i64 %d
+}