diff options
| author | Thomas Lively <tlively@google.com> | 2018-10-20 01:31:18 +0000 |
|---|---|---|
| committer | Thomas Lively <tlively@google.com> | 2018-10-20 01:31:18 +0000 |
| commit | 55735d522d1fa24908dc40475769a64bbb603108 (patch) | |
| tree | 1e984dd5cf9d15ff735fdb792ce4c2115ace15a3 /llvm/test/CodeGen/WebAssembly | |
| parent | 9c8f3c9654885eb321573fbb4f5da58ae38cd087 (diff) | |
| download | bcm5719-llvm-55735d522d1fa24908dc40475769a64bbb603108.tar.gz bcm5719-llvm-55735d522d1fa24908dc40475769a64bbb603108.zip | |
[WebAssembly] Custom lower i64x2 constant shifts to avoid wrap
Summary: Depends on D53057.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53251
llvm-svn: 344825
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly')
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/simd-arith.ll | 29 |
1 files changed, 26 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/simd-arith.ll b/llvm/test/CodeGen/WebAssembly/simd-arith.ll index 973f78b30dc..689853fa7bb 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-arith.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-arith.ll @@ -605,9 +605,8 @@ define <2 x i64> @shl_nozext_v2i64(<2 x i64> %v, i64 %x) { ; NO-SIMD128-NOT: i64x2 ; SIMD128-NEXT: .param v128{{$}} ; SIMD128-NEXT: .result v128{{$}} -; SIMD128-NEXT: i64.const $push[[L0:[0-9]+]]=, 5{{$}} -; SIMD128-NEXT: i32.wrap/i64 $push[[L1:[0-9]+]]=, $pop[[L0]]{{$}} -; SIMD128-NEXT: i64x2.shl $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5{{$}} +; SIMD128-NEXT: i64x2.shl $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}} ; SIMD128-NEXT: return $pop[[R]]{{$}} define <2 x i64> @shl_const_v2i64(<2 x i64> %v) { %a = shl <2 x i64> %v, <i64 5, i64 5> @@ -642,6 +641,18 @@ define <2 x i64> @shr_s_nozext_v2i64(<2 x i64> %v, i64 %x) { ret <2 x i64> %a } +; CHECK-LABEL: shr_s_const_v2i64: +; NO-SIMD128-NOT: i64x2 +; SIMD128-NEXT: .param v128{{$}} +; SIMD128-NEXT: .result v128{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5{{$}} +; SIMD128-NEXT: i64x2.shr_s $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +define <2 x i64> @shr_s_const_v2i64(<2 x i64> %v) { + %a = ashr <2 x i64> %v, <i64 5, i64 5> + ret <2 x i64> %a +} + ; CHECK-LABEL: shr_u_v2i64: ; NO-SIMD128-NOT: i64x2 ; SIMD128-NEXT: .param v128, i32{{$}} @@ -670,6 +681,18 @@ define <2 x i64> @shr_u_nozext_v2i64(<2 x i64> %v, i64 %x) { ret <2 x i64> %a } +; CHECK-LABEL: shr_u_const_v2i64: +; NO-SIMD128-NOT: i64x2 +; SIMD128-NEXT: .param v128{{$}} +; SIMD128-NEXT: .result v128{{$}} +; SIMD128-NEXT: i32.const $push[[L0:[0-9]+]]=, 5{{$}} +; SIMD128-NEXT: i64x2.shr_u $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +define <2 x i64> @shr_u_const_v2i64(<2 x i64> %v) { + %a = lshr <2 x i64> %v, <i64 5, i64 5> + ret <2 x i64> %a +} + ; CHECK-LABEL: and_v2i64: ; NO-SIMD128-NOT: v128 ; SIMD128-VM-NOT: v128 |
