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author | Dan Gohman <dan433584@gmail.com> | 2016-05-17 20:19:47 +0000 |
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committer | Dan Gohman <dan433584@gmail.com> | 2016-05-17 20:19:47 +0000 |
commit | 12de0b91ac1f585ed7d11a25fc7cb841a1826aa3 (patch) | |
tree | 9d7c73981d8287fd0a5cdd00932ffce9abf26faf /llvm/test/CodeGen/WebAssembly | |
parent | 8da773bf74f29c10f81b382f39a06f2486e4216c (diff) | |
download | bcm5719-llvm-12de0b91ac1f585ed7d11a25fc7cb841a1826aa3.tar.gz bcm5719-llvm-12de0b91ac1f585ed7d11a25fc7cb841a1826aa3.zip |
[WebAssembly] Stackify induction variable increment instructions.
This handles instructions where the defined register is also used, as in
"x = x + 1".
llvm-svn: 269830
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly')
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/cfg-stackify.ll | 34 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/reg-stackify.ll | 24 |
2 files changed, 44 insertions, 14 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll index ff945706778..cbb45611cec 100644 --- a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll +++ b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll @@ -15,10 +15,10 @@ declare void @something() ; CHECK-LABEL: test0: ; CHECK: loop -; CHECK-NOT: br -; CHECK: i32.add ; CHECK-NEXT: block -; CHECK-NEXT: i32.lt_s +; CHECK-NEXT: i32.const +; CHECK-NEXT: i32.add +; CHECK: i32.lt_s ; CHECK-NEXT: br_if ; CHECK-NEXT: return ; CHECK-NEXT: .LBB0_3: @@ -29,9 +29,9 @@ declare void @something() ; CHECK-NEXT: end_loop ; OPT-LABEL: test0: ; OPT: loop -; OPT-NOT: br -; OPT: i32.add -; OPT-NEXT: i32.ge_s +; OPT-NEXT: i32.const +; OPT-NEXT: i32.add +; OPT: i32.ge_s ; OPT-NEXT: br_if ; OPT-NOT: br ; OPT: call @@ -60,10 +60,10 @@ back: ; CHECK-LABEL: test1: ; CHECK: loop -; CHECK-NOT: br -; CHECK: i32.add ; CHECK-NEXT: block -; CHECK-NEXT: i32.lt_s +; CHECK-NEXT: i32.const +; CHECK-NEXT: i32.add +; CHECK: i32.lt_s ; CHECK-NEXT: br_if ; CHECK-NEXT: return ; CHECK-NEXT: .LBB1_3: @@ -74,9 +74,9 @@ back: ; CHECK-NEXT: end_loop ; OPT-LABEL: test1: ; OPT: loop -; OPT-NOT: br -; OPT: i32.add -; OPT-NEXT: i32.ge_s +; OPT-NEXT: i32.const +; OPT-NEXT: i32.add +; OPT: i32.ge_s ; OPT-NEXT: br_if ; OPT-NOT: br ; OPT: call @@ -108,16 +108,22 @@ back: ; CHECK: block{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: .LBB2_{{[0-9]+}}: -; CHECK: br_if 0, ${{[0-9]+}}{{$}} +; CHECK: loop +; CHECK: br_if 0, $pop{{[0-9]+}}{{$}} ; CHECK: .LBB2_{{[0-9]+}}: +; CHECK: end_loop +; CHECK: end_block ; CHECK: return{{$}} ; OPT-LABEL: test2: ; OPT-NOT: local ; OPT: block{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: .LBB2_{{[0-9]+}}: -; OPT: br_if 0, ${{[0-9]+}}{{$}} +; OPT: loop +; OPT: br_if 0, $pop{{[0-9]+}}{{$}} ; OPT: .LBB2_{{[0-9]+}}: +; OPT: end_loop +; OPT: end_block ; OPT: return{{$}} define void @test2(double* nocapture %p, i32 %n) { entry: diff --git a/llvm/test/CodeGen/WebAssembly/reg-stackify.ll b/llvm/test/CodeGen/WebAssembly/reg-stackify.ll index 8518f4c1f49..bc36357c0b9 100644 --- a/llvm/test/CodeGen/WebAssembly/reg-stackify.ll +++ b/llvm/test/CodeGen/WebAssembly/reg-stackify.ll @@ -400,6 +400,30 @@ define i32 @no_stackify_past_epilogue() { ret i32 %call } +; Stackify a loop induction variable into a loop comparison. + +; CHECK_LABEL: stackify_indvar: +; CHECK: i32.const $push[[L5:.+]]=, 1{{$}} +; CHECK-NEXT: i32.add $push[[L4:.+]]=, $[[R0:.+]], $pop[[L5]]{{$}} +; CHECK-NEXT: tee_local $push[[L3:.+]]=, $[[R0]]=, $pop[[L4]]{{$}} +; CHECK-NEXT: i32.ne $push[[L2:.+]]=, $0, $pop[[L3]]{{$}} +define void @stackify_indvar(i32 %tmp, i32* %v) #0 { +bb: + br label %bb3 + +bb3: ; preds = %bb3, %bb2 + %tmp4 = phi i32 [ %tmp7, %bb3 ], [ 0, %bb ] + %tmp5 = load volatile i32, i32* %v, align 4 + %tmp6 = add nsw i32 %tmp5, %tmp4 + store volatile i32 %tmp6, i32* %v, align 4 + %tmp7 = add nuw nsw i32 %tmp4, 1 + %tmp8 = icmp eq i32 %tmp7, %tmp + br i1 %tmp8, label %bb10, label %bb3 + +bb10: ; preds = %bb9, %bb + ret void +} + !llvm.module.flags = !{!0} !llvm.dbg.cu = !{!1} |