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authorThomas Lively <tlively@google.com>2019-10-29 22:31:22 -0700
committerThomas Lively <tlively@google.com>2019-10-31 14:22:30 -0700
commit11850a6305c5778b180243eb06aefe86762dd4ce (patch)
tree88248bd32ea04c4c54abd01433fadddf6e6cc1fd /llvm/test/CodeGen/WebAssembly
parentd816d9bdc585bbf77a7a1c47a7199fd9e0c34402 (diff)
downloadbcm5719-llvm-11850a6305c5778b180243eb06aefe86762dd4ce.tar.gz
bcm5719-llvm-11850a6305c5778b180243eb06aefe86762dd4ce.zip
[WebAssembly] Expand setcc of v2i64
Summary: The SIMD spec does not include i64x2 comparisons, so they need to be expanded. Using setOperationAction to expand them also causes f64x2 comparisons to be expanded, so setCondCodeAction needs to be used instead. But since there are no legal condition codes, the legalizer does not know how to expand the comparisons. We therefore manually unroll the operation, taking care to fill each lane with -1 or 0 rather than 1 or 0 for consistency with the other vector comparisons. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69604
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly')
-rw-r--r--llvm/test/CodeGen/WebAssembly/simd-comparisons.ll150
1 files changed, 150 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll b/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
index 2decd38fa84..3b6af73eb15 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-comparisons.ll
@@ -637,6 +637,156 @@ define <4 x i32> @compare_sext_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
ret <4 x i32> %res
}
+; CHECK-LABEL: compare_eq_v2i64:
+; SIMD128-NEXT: .functype compare_eq_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_eq_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp eq <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_eq_v2i64:
+; SIMD128-NEXT: .functype compare_sext_eq_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_eq_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp eq <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_ne_v2i64:
+; SIMD128-NEXT: .functype compare_ne_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_ne_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp ne <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_ne_v2i64:
+; SIMD128-NEXT: .functype compare_sext_ne_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_ne_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp ne <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_slt_v2i64:
+; SIMD128-NEXT: .functype compare_slt_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_slt_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp slt <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_slt_v2i64:
+; SIMD128-NEXT: .functype compare_sext_slt_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_slt_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp slt <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_ult_v2i64:
+; SIMD128-NEXT: .functype compare_ult_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_ult_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp ult <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_ult_v2i64:
+; SIMD128-NEXT: .functype compare_sext_ult_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_ult_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp ult <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_sle_v2i64:
+; SIMD128-NEXT: .functype compare_sle_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_sle_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp sle <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_sle_v2i64:
+; SIMD128-NEXT: .functype compare_sext_sle_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_sle_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp sle <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_ule_v2i64:
+; SIMD128-NEXT: .functype compare_ule_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_ule_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp ule <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_ule_v2i64:
+; SIMD128-NEXT: .functype compare_sext_ule_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_ule_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp ule <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_sgt_v2i64:
+; SIMD128-NEXT: .functype compare_sgt_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_sgt_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp sgt <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_sgt_v2i64:
+; SIMD128-NEXT: .functype compare_sext_sgt_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_sgt_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp sgt <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_ugt_v2i64:
+; SIMD128-NEXT: .functype compare_ugt_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_ugt_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp ugt <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_ugt_v2i64:
+; SIMD128-NEXT: .functype compare_sext_ugt_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_ugt_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp ugt <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_sge_v2i64:
+; SIMD128-NEXT: .functype compare_sge_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_sge_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp sge <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_sge_v2i64:
+; SIMD128-NEXT: .functype compare_sext_sge_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_sge_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp sge <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
+; CHECK-LABEL: compare_uge_v2i64:
+; SIMD128-NEXT: .functype compare_uge_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i1> @compare_uge_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %res = icmp uge <2 x i64> %x, %y
+ ret <2 x i1> %res
+}
+
+; CHECK-LABEL: compare_sext_uge_v2i64:
+; SIMD128-NEXT: .functype compare_sext_uge_v2i64 (v128, v128) -> (v128){{$}}
+define <2 x i64> @compare_sext_uge_v2i64 (<2 x i64> %x, <2 x i64> %y) {
+ %cmp = icmp uge <2 x i64> %x, %y
+ %res = sext <2 x i1> %cmp to <2 x i64>
+ ret <2 x i64> %res
+}
+
; CHECK-LABEL: compare_oeq_v4f32:
; NO-SIMD128-NOT: f32x4
; SIMD128-NEXT: .functype compare_oeq_v4f32 (v128, v128) -> (v128){{$}}
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