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| author | Jatin Bhateja <jatin.bhateja@gmail.com> | 2017-11-10 16:26:04 +0000 |
|---|---|---|
| committer | Jatin Bhateja <jatin.bhateja@gmail.com> | 2017-11-10 16:26:04 +0000 |
| commit | aaa5944ad4cef316634423d0683c36149c4c76b6 (patch) | |
| tree | 9f072e74898de116a0244ab7c91b979178d2d840 /llvm/test/CodeGen/WebAssembly/umulo-i64.ll | |
| parent | 0f4075e0b12adc8e2bef4c389d1d44861ae4ff05 (diff) | |
| download | bcm5719-llvm-aaa5944ad4cef316634423d0683c36149c4c76b6.tar.gz bcm5719-llvm-aaa5944ad4cef316634423d0683c36149c4c76b6.zip | |
[WebAssembly] Fix stack offsets of return values from call lowering.
Summary: Fixes PR35220
Reviewers: vadimcn, alexcrichton
Reviewed By: alexcrichton
Subscribers: pepyakin, alexcrichton, jfb, dschuff, sbc100, jgravelle-google, llvm-commits, aheejin
Differential Revision: https://reviews.llvm.org/D39866
llvm-svn: 317895
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly/umulo-i64.ll')
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/umulo-i64.ll | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/umulo-i64.ll b/llvm/test/CodeGen/WebAssembly/umulo-i64.ll index e47c8aa0bb3..75c2d507e4a 100644 --- a/llvm/test/CodeGen/WebAssembly/umulo-i64.ll +++ b/llvm/test/CodeGen/WebAssembly/umulo-i64.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s ; Test that UMULO works correctly on 64-bit operands. target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" -target triple = "wasm32-unknown-emscripten" +target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE: ; CHECK: __multi3 @@ -19,3 +19,14 @@ declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1 attributes #0 = { inlinehint } attributes #1 = { nounwind readnone speculatable } + +; CHECK-LABEL: wut: +; CHECK: call __multi3@FUNCTION, $2, $0, $pop0, $1, $pop10 +; CHECK: i64.load $0=, 8($2) +define i1 @wut(i64, i64) { +start: + %2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1) + %3 = extractvalue { i64, i1 } %2, 1 + ret i1 %3 +} + |
