diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-08-08 10:37:03 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-08-08 10:37:03 +0000 |
| commit | e2e366797ed51599c57e64417e616ccbd39c9901 (patch) | |
| tree | 047755ab75e0dd1b664497b74dc385761bcd6cc3 /llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll | |
| parent | 987331671f02d66dec825e662f07deb507d90a36 (diff) | |
| download | bcm5719-llvm-e2e366797ed51599c57e64417e616ccbd39c9901.tar.gz bcm5719-llvm-e2e366797ed51599c57e64417e616ccbd39c9901.zip | |
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT
This patch attempts to peek through vectors based on the demanded bits/elt of a particular ISD::EXTRACT_VECTOR_ELT node, allowing us to avoid dependencies on ops that have no impact on the extract.
In particular this helps remove some unnecessary scalar->vector->scalar patterns.
The wasm shift patterns are annoying - @tlively has indicated that the wasm vector shift codegen are to be refactored in the near-term and isn't considered a major issue.
Differential Revision: https://reviews.llvm.org/D65887
llvm-svn: 368276
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll')
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll b/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll index b00fcf68f2d..149b1842b6c 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll @@ -21,16 +21,6 @@ define void @foo(<4 x i8>* %p) { ; CHECK: .functype foo (i32) -> () ; CHECK-NEXT: i32.load8_u 0 ; CHECK-NEXT: i32x4.splat -; CHECK-NEXT: i32.load8_u 1 -; CHECK-NEXT: i32x4.replace_lane 1 -; CHECK-NEXT: i32.const 2 -; CHECK-NEXT: i32.add -; CHECK-NEXT: i32.load8_u 0 -; CHECK-NEXT: i32x4.replace_lane 2 -; CHECK-NEXT: i32.const 3 -; CHECK-NEXT: i32.add -; CHECK-NEXT: i32.load8_u 0 -; CHECK-NEXT: i32x4.replace_lane 3 ; CHECK-NEXT: local.tee ; CHECK-NEXT: i8x16.extract_lane_s 0 ; CHECK-NEXT: f64.convert_i32_s @@ -40,6 +30,9 @@ define void @foo(<4 x i8>* %p) { ; CHECK-NEXT: f64.add ; CHECK-NEXT: f32.demote_f64 ; CHECK-NEXT: f32x4.splat +; CHECK-NEXT: i32.load8_u 1 +; CHECK-NEXT: i32x4.replace_lane 1 +; CHECK-NEXT: local.tee ; CHECK-NEXT: i8x16.extract_lane_s 4 ; CHECK-NEXT: f64.convert_i32_s ; CHECK-NEXT: f64.const 0x0p0 @@ -48,6 +41,11 @@ define void @foo(<4 x i8>* %p) { ; CHECK-NEXT: f64.add ; CHECK-NEXT: f32.demote_f64 ; CHECK-NEXT: f32x4.replace_lane 1 +; CHECK-NEXT: i32.const 2 +; CHECK-NEXT: i32.add +; CHECK-NEXT: i32.load8_u 0 +; CHECK-NEXT: i32x4.replace_lane 2 +; CHECK-NEXT: local.tee ; CHECK-NEXT: i8x16.extract_lane_s 8 ; CHECK-NEXT: f64.convert_i32_s ; CHECK-NEXT: f64.const 0x0p0 @@ -56,6 +54,10 @@ define void @foo(<4 x i8>* %p) { ; CHECK-NEXT: f64.add ; CHECK-NEXT: f32.demote_f64 ; CHECK-NEXT: f32x4.replace_lane 2 +; CHECK-NEXT: i32.const 3 +; CHECK-NEXT: i32.add +; CHECK-NEXT: i32.load8_u 0 +; CHECK-NEXT: i32x4.replace_lane 3 ; CHECK-NEXT: i8x16.extract_lane_s 12 ; CHECK-NEXT: f64.convert_i32_s ; CHECK-NEXT: f64.const 0x0p0 |
