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| author | Hans Wennborg <hans@hanshq.net> | 2019-08-13 09:33:25 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@hanshq.net> | 2019-08-13 09:33:25 +0000 |
| commit | 5390d25f2b5cd6a9b234e30269661d7019a9850e (patch) | |
| tree | b3eec796eb2d4d1b6e4bdbcddffcdb51f2a3632a /llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll | |
| parent | c6cd62352cc15110c7a7389721560046a6635cde (diff) | |
| download | bcm5719-llvm-5390d25f2b5cd6a9b234e30269661d7019a9850e.tar.gz bcm5719-llvm-5390d25f2b5cd6a9b234e30269661d7019a9850e.zip | |
Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT"
This introduced a false positive MemorySanitizer warning about use of
uninitialized memory in a vectorized crc function in Chromium. That suggests
maybe something is not right with this transformation. See
https://crbug.com/992853#c7 for a reproducer.
This also reverts the follow-up commits r368307 and r368308 which
depended on this.
> This patch attempts to peek through vectors based on the demanded bits/elt of a particular ISD::EXTRACT_VECTOR_ELT node, allowing us to avoid dependencies on ops that have no impact on the extract.
>
> In particular this helps remove some unnecessary scalar->vector->scalar patterns.
>
> The wasm shift patterns are annoying - @tlively has indicated that the wasm vector shift codegen are to be refactored in the near-term and isn't considered a major issue.
>
> Differential Revision: https://reviews.llvm.org/D65887
llvm-svn: 368660
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll')
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll b/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll index 149b1842b6c..b00fcf68f2d 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll @@ -21,6 +21,16 @@ define void @foo(<4 x i8>* %p) { ; CHECK: .functype foo (i32) -> () ; CHECK-NEXT: i32.load8_u 0 ; CHECK-NEXT: i32x4.splat +; CHECK-NEXT: i32.load8_u 1 +; CHECK-NEXT: i32x4.replace_lane 1 +; CHECK-NEXT: i32.const 2 +; CHECK-NEXT: i32.add +; CHECK-NEXT: i32.load8_u 0 +; CHECK-NEXT: i32x4.replace_lane 2 +; CHECK-NEXT: i32.const 3 +; CHECK-NEXT: i32.add +; CHECK-NEXT: i32.load8_u 0 +; CHECK-NEXT: i32x4.replace_lane 3 ; CHECK-NEXT: local.tee ; CHECK-NEXT: i8x16.extract_lane_s 0 ; CHECK-NEXT: f64.convert_i32_s @@ -30,9 +40,6 @@ define void @foo(<4 x i8>* %p) { ; CHECK-NEXT: f64.add ; CHECK-NEXT: f32.demote_f64 ; CHECK-NEXT: f32x4.splat -; CHECK-NEXT: i32.load8_u 1 -; CHECK-NEXT: i32x4.replace_lane 1 -; CHECK-NEXT: local.tee ; CHECK-NEXT: i8x16.extract_lane_s 4 ; CHECK-NEXT: f64.convert_i32_s ; CHECK-NEXT: f64.const 0x0p0 @@ -41,11 +48,6 @@ define void @foo(<4 x i8>* %p) { ; CHECK-NEXT: f64.add ; CHECK-NEXT: f32.demote_f64 ; CHECK-NEXT: f32x4.replace_lane 1 -; CHECK-NEXT: i32.const 2 -; CHECK-NEXT: i32.add -; CHECK-NEXT: i32.load8_u 0 -; CHECK-NEXT: i32x4.replace_lane 2 -; CHECK-NEXT: local.tee ; CHECK-NEXT: i8x16.extract_lane_s 8 ; CHECK-NEXT: f64.convert_i32_s ; CHECK-NEXT: f64.const 0x0p0 @@ -54,10 +56,6 @@ define void @foo(<4 x i8>* %p) { ; CHECK-NEXT: f64.add ; CHECK-NEXT: f32.demote_f64 ; CHECK-NEXT: f32x4.replace_lane 2 -; CHECK-NEXT: i32.const 3 -; CHECK-NEXT: i32.add -; CHECK-NEXT: i32.load8_u 0 -; CHECK-NEXT: i32x4.replace_lane 3 ; CHECK-NEXT: i8x16.extract_lane_s 12 ; CHECK-NEXT: f64.convert_i32_s ; CHECK-NEXT: f64.const 0x0p0 |
