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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-05-30 17:55:25 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-05-30 17:55:25 +0000 |
| commit | 645e1ad33a228162af5a14f971600bd2e5513b11 (patch) | |
| tree | 1afb7391eb7e74ccfdecd0e7e511808caffa4d09 /llvm/test/CodeGen/WebAssembly/non-executable-stack.ll | |
| parent | 720f8da33aea7d3bcbf3b64ff251a45f3686ff40 (diff) | |
| download | bcm5719-llvm-645e1ad33a228162af5a14f971600bd2e5513b11.tar.gz bcm5719-llvm-645e1ad33a228162af5a14f971600bd2e5513b11.zip | |
[X86][SSE] _mm_store1_ps/_mm_store1_pd should require an aligned pointer
According to the gcc headers, intel intrinsics docs and msdn codegen the _mm_store1_pd (and its _mm_store_pd1 equivalent) should use an aligned pointer - the clang headers are the only implementation I can find that assume non-aligned stores (by storing with _mm_storeu_pd).
Additionally, according to the intel intrinsics docs and msdn codegen the _mm_store1_ps (_mm_store_ps1) requires a similarly aligned pointer.
This patch raises the alignment requirements to match the other implementations by calling _mm_store_ps/_mm_store_pd instead.
I've also added the missing _mm_store_pd1 intrinsic (which maps to _mm_store1_pd like _mm_store_ps1 does to _mm_store1_ps).
As a followup I'll update the llvm fast-isel tests to match this codegen.
Differential Revision: http://reviews.llvm.org/D20617
llvm-svn: 271218
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly/non-executable-stack.ll')
0 files changed, 0 insertions, 0 deletions

