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author | Dan Gohman <dan433584@gmail.com> | 2015-11-12 17:04:33 +0000 |
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committer | Dan Gohman <dan433584@gmail.com> | 2015-11-12 17:04:33 +0000 |
commit | cf4748f18000ac24fb9d07d493be59cf035c8d68 (patch) | |
tree | c0290611ac29080e8b3c34f27acc95882da87d4b /llvm/test/CodeGen/WebAssembly/load-store-i1.ll | |
parent | 02bf92d22651dd7feb2828974fdcc5dc0e23ddfb (diff) | |
download | bcm5719-llvm-cf4748f18000ac24fb9d07d493be59cf035c8d68.tar.gz bcm5719-llvm-cf4748f18000ac24fb9d07d493be59cf035c8d68.zip |
[WebAssembly] Reapply r252858, with svn add for the new file.
Switch to MC for instruction printing.
This encompasses several changes which are all interconnected:
- Use the MC framework for printing almost all instructions.
- AsmStrings are now live.
- This introduces an indirection between LLVM vregs and WebAssembly registers,
and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping.
This addresses some basic issues with argument registers and unused registers.
- The way ARGUMENT instructions are handled no longer generates redundant
get_local+set_local for every argument.
This also changes the assembly syntax somewhat; most notably, MC's printing
does not use sigils on label names, so those are no longer present, and
push/pop now have a sigil to keep them unambiguous.
The usage of set_local/get_local/$push/$pop will continue to evolve
significantly. This patch is just one step of a larger change.
llvm-svn: 252910
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly/load-store-i1.ll')
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/load-store-i1.ll | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/load-store-i1.ll b/llvm/test/CodeGen/WebAssembly/load-store-i1.ll index cb89e2c1772..ba14294b96a 100644 --- a/llvm/test/CodeGen/WebAssembly/load-store-i1.ll +++ b/llvm/test/CodeGen/WebAssembly/load-store-i1.ll @@ -6,9 +6,9 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: load_u_i1_i32: -; CHECK: i32.load8_u push, (get_local 1){{$}} -; CHECK-NEXT: set_local 2, pop{{$}} -; CHECK-NEXT: return (get_local 2){{$}} +; CHECK: i32.load8_u $push, (get_local 0){{$}} +; CHECK-NEXT: set_local 1, $pop{{$}} +; CHECK-NEXT: return (get_local 1){{$}} define i32 @load_u_i1_i32(i1* %p) { %v = load i1, i1* %p %e = zext i1 %v to i32 @@ -16,15 +16,15 @@ define i32 @load_u_i1_i32(i1* %p) { } ; CHECK-LABEL: load_s_i1_i32: -; CHECK: i32.load8_u push, (get_local 1){{$}} -; CHECK-NEXT: set_local 2, pop{{$}} -; CHECK-NEXT: i32.const push, 31{{$}} -; CHECK-NEXT: set_local 3, pop{{$}} -; CHECK-NEXT: shl push, (get_local 2), (get_local 3){{$}} -; CHECK-NEXT: set_local 4, pop{{$}} -; CHECK-NEXT: shr_s push, (get_local 4), (get_local 3){{$}} -; CHECK-NEXT: set_local 5, pop{{$}} -; CHECK-NEXT: return (get_local 5){{$}} +; CHECK: i32.load8_u $push, (get_local 0){{$}} +; CHECK-NEXT: set_local 1, $pop{{$}} +; CHECK-NEXT: i32.const $push, 31{{$}} +; CHECK-NEXT: set_local 2, $pop{{$}} +; CHECK-NEXT: shl $push, (get_local 1), (get_local 2){{$}} +; CHECK-NEXT: set_local 3, $pop{{$}} +; CHECK-NEXT: shr_s $push, (get_local 3), (get_local 2){{$}} +; CHECK-NEXT: set_local 4, $pop{{$}} +; CHECK-NEXT: return (get_local 4){{$}} define i32 @load_s_i1_i32(i1* %p) { %v = load i1, i1* %p %e = sext i1 %v to i32 @@ -32,9 +32,9 @@ define i32 @load_s_i1_i32(i1* %p) { } ; CHECK-LABEL: load_u_i1_i64: -; CHECK: i64.load8_u push, (get_local 1){{$}} -; CHECK-NEXT: set_local 2, pop{{$}} -; CHECK-NEXT: return (get_local 2){{$}} +; CHECK: i64.load8_u $push, (get_local 0){{$}} +; CHECK-NEXT: set_local 1, $pop{{$}} +; CHECK-NEXT: return (get_local 1){{$}} define i64 @load_u_i1_i64(i1* %p) { %v = load i1, i1* %p %e = zext i1 %v to i64 @@ -42,15 +42,15 @@ define i64 @load_u_i1_i64(i1* %p) { } ; CHECK-LABEL: load_s_i1_i64: -; CHECK: i64.load8_u push, (get_local 1){{$}} -; CHECK-NEXT: set_local 2, pop{{$}} -; CHECK-NEXT: i64.const push, 63{{$}} -; CHECK-NEXT: set_local 3, pop{{$}} -; CHECK-NEXT: shl push, (get_local 2), (get_local 3){{$}} -; CHECK-NEXT: set_local 4, pop{{$}} -; CHECK-NEXT: shr_s push, (get_local 4), (get_local 3){{$}} -; CHECK-NEXT: set_local 5, pop{{$}} -; CHECK-NEXT: return (get_local 5){{$}} +; CHECK: i64.load8_u $push, (get_local 0){{$}} +; CHECK-NEXT: set_local 1, $pop{{$}} +; CHECK-NEXT: i64.const $push, 63{{$}} +; CHECK-NEXT: set_local 2, $pop{{$}} +; CHECK-NEXT: shl $push, (get_local 1), (get_local 2){{$}} +; CHECK-NEXT: set_local 3, $pop{{$}} +; CHECK-NEXT: shr_s $push, (get_local 3), (get_local 2){{$}} +; CHECK-NEXT: set_local 4, $pop{{$}} +; CHECK-NEXT: return (get_local 4){{$}} define i64 @load_s_i1_i64(i1* %p) { %v = load i1, i1* %p %e = sext i1 %v to i64 @@ -58,11 +58,11 @@ define i64 @load_s_i1_i64(i1* %p) { } ; CHECK-LABEL: store_i32_i1: -; CHECK: i32.const push, 1{{$}} -; CHECK-NEXT: set_local 4, pop{{$}} -; CHECK-NEXT: i32.and push, (get_local 3), (get_local 4){{$}} -; CHECK-NEXT: set_local 5, pop{{$}} -; CHECK-NEXT: i32.store8 (get_local 2), (get_local 5){{$}} +; CHECK: i32.const $push, 1{{$}} +; CHECK-NEXT: set_local 2, $pop{{$}} +; CHECK-NEXT: i32.and $push, (get_local 1), (get_local 2){{$}} +; CHECK-NEXT: set_local 3, $pop{{$}} +; CHECK-NEXT: i32.store8 (get_local 0), (get_local 3){{$}} define void @store_i32_i1(i1* %p, i32 %v) { %t = trunc i32 %v to i1 store i1 %t, i1* %p @@ -70,11 +70,11 @@ define void @store_i32_i1(i1* %p, i32 %v) { } ; CHECK-LABEL: store_i64_i1: -; CHECK: i64.const push, 1{{$}} -; CHECK-NEXT: set_local 4, pop{{$}} -; CHECK-NEXT: i64.and push, (get_local 3), (get_local 4){{$}} -; CHECK-NEXT: set_local 5, pop{{$}} -; CHECK-NEXT: i64.store8 (get_local 2), (get_local 5){{$}} +; CHECK: i64.const $push, 1{{$}} +; CHECK-NEXT: set_local 2, $pop{{$}} +; CHECK-NEXT: i64.and $push, (get_local 1), (get_local 2){{$}} +; CHECK-NEXT: set_local 3, $pop{{$}} +; CHECK-NEXT: i64.store8 (get_local 0), (get_local 3){{$}} define void @store_i64_i1(i1* %p, i64 %v) { %t = trunc i64 %v to i1 store i1 %t, i1* %p |