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authorHeejin Ahn <aheejin@gmail.com>2018-07-09 20:18:21 +0000
committerHeejin Ahn <aheejin@gmail.com>2018-07-09 20:18:21 +0000
commitd31bc9866b1bb85670264f0eb4f7085655b69f38 (patch)
tree4f0b09b12549d63453b0f2c3a18f39bae70b3c9b /llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
parentd153d46884efd6fd4feea6f5b268efa7c6c5573a (diff)
downloadbcm5719-llvm-d31bc9866b1bb85670264f0eb4f7085655b69f38.tar.gz
bcm5719-llvm-d31bc9866b1bb85670264f0eb4f7085655b69f38.zip
[WebAssembly] Improve readability of load/stores and tests. NFC.
Summary: - Changed variable/function names to be more consistent - Improved comments in test files - Added more tests - Fixed a few typos - Misc. cosmetic changes Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D49087 llvm-svn: 336598
Diffstat (limited to 'llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll')
-rw-r--r--llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll27
1 files changed, 22 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll b/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
index f3b8e15b602..eb303c150ef 100644
--- a/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
+++ b/llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll
@@ -5,7 +5,9 @@
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
-; Loads.
+;===----------------------------------------------------------------------------
+; Loads
+;===----------------------------------------------------------------------------
; CHECK-LABEL: ldi64_a1:
; CHECK-NEXT: .param i32{{$}}
@@ -73,7 +75,9 @@ define i64 @ldi64_a16(i64 *%p) {
ret i64 %v
}
-; Extending loads.
+;===----------------------------------------------------------------------------
+; Extending loads
+;===----------------------------------------------------------------------------
; CHECK-LABEL: ldi8_a1:
; CHECK-NEXT: .param i32{{$}}
@@ -174,7 +178,9 @@ define i64 @ldi32_a8(i32 *%p) {
ret i64 %w
}
-; Stores.
+;===----------------------------------------------------------------------------
+; Stores
+;===----------------------------------------------------------------------------
; CHECK-LABEL: sti64_a1:
; CHECK-NEXT: .param i32, i64{{$}}
@@ -234,7 +240,9 @@ define void @sti64_a16(i64 *%p, i64 %v) {
ret void
}
-; Truncating stores.
+;===----------------------------------------------------------------------------
+; Truncating stores
+;===----------------------------------------------------------------------------
; CHECK-LABEL: sti8_a1:
; CHECK-NEXT: .param i32, i64{{$}}
@@ -326,7 +334,10 @@ define void @sti32_a8(i32 *%p, i64 %w) {
ret void
}
-; Atomics.
+;===----------------------------------------------------------------------------
+; Atomic loads
+;===----------------------------------------------------------------------------
+
; Wasm atomics have the alignment field, but it must always have the type's
; natural alignment.
@@ -341,6 +352,7 @@ define i64 @ldi64_atomic_a8(i64 *%p) {
}
; 16 is greater than the default alignment so it is ignored.
+
; CHECK-LABEL: ldi64_atomic_a16:
; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}}
@@ -351,6 +363,10 @@ define i64 @ldi64_atomic_a16(i64 *%p) {
ret i64 %v
}
+;===----------------------------------------------------------------------------
+; Atomic stores
+;===----------------------------------------------------------------------------
+
; CHECK-LABEL: sti64_atomic_a4:
; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
@@ -361,6 +377,7 @@ define void @sti64_atomic_a4(i64 *%p, i64 %v) {
}
; 16 is greater than the default alignment so it is ignored.
+
; CHECK-LABEL: sti64_atomic_a8:
; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
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