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authorEli Friedman <efriedma@codeaurora.org>2018-11-07 21:08:13 +0000
committerEli Friedman <efriedma@codeaurora.org>2018-11-07 21:08:13 +0000
commit7d7d41debc9abdda7b3710cdabe2bc64e03d5578 (patch)
treef30f2999d2cca4812cae6a154fe5d8cf16d33087 /llvm/test/CodeGen/Thumb
parent3c5d23912b2a6abe4672679ff2c880d562167e37 (diff)
downloadbcm5719-llvm-7d7d41debc9abdda7b3710cdabe2bc64e03d5578.tar.gz
bcm5719-llvm-7d7d41debc9abdda7b3710cdabe2bc64e03d5578.zip
[ARM] Fix CPSR liveness in tMOVCCr_pseudo lowering.
The lowering was missing live-ins in certain cases, like a sequence of multiple tMOVCCr_pseudo instructions. This would lead to a verifier failure, and on pre-v6 Thumb CPSR would be incorrectly clobbered. For reasons I don't completely understand, it's hard to get a sequence of multiple tMOVCCr_pseudo instructions; the issue only seems to show up with 64-bit comparisons where the result is zero-extended. I added some extra testcases in case that changes in the future. Probably some optimization opportunities here if anyone is interested. (@test_slt_not is the case that was getting miscompiled.) The code to check the liveness of CPSR was stolen from X86ISelLowering.cpp; maybe it could be refactored into common helper, but I have no idea where to put it. Differential Revision: https://reviews.llvm.org/D54192 llvm-svn: 346355
Diffstat (limited to 'llvm/test/CodeGen/Thumb')
-rw-r--r--llvm/test/CodeGen/Thumb/select.ll25
1 files changed, 23 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Thumb/select.ll b/llvm/test/CodeGen/Thumb/select.ll
index 41ace62de53..36f16ad44a0 100644
--- a/llvm/test/CodeGen/Thumb/select.ll
+++ b/llvm/test/CodeGen/Thumb/select.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s
-; RUN: llc < %s -mtriple=thumb-pc-linux-gnueabi | FileCheck -check-prefix=CHECK-EABI %s
+; RUN: llc < %s -mtriple=thumb-apple-darwin -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=thumb-pc-linux-gnueabi -verify-machineinstrs | FileCheck -check-prefix=CHECK-EABI %s
define i32 @f1(i32 %a.s) {
entry:
@@ -80,3 +80,24 @@ define double @f7(double %a, double %b) {
; CHECK-EABI: __aeabi_dcmplt
; CHECK-EABI: {{bne|beq}}
; CHECK-EABI: {{bne|beq}}
+
+define {i32, i32} @f8(i32 %a, i32 %b, i32 %c, i32 %d) {
+entry:
+ %cmp = icmp slt i32 %a, %b
+ %r1 = select i1 %cmp, i32 %c, i32 %a
+ %r2 = select i1 %cmp, i32 %d, i32 %b
+ %z = insertvalue { i32, i32 } undef, i32 %r1, 0
+ %z2 = insertvalue { i32, i32 } %z, i32 %r2, 1
+ ret { i32, i32 } %z2
+}
+
+; CHECK-LABEL: f8:
+; CHECK: cmp r0, r1
+; CHECK: blt
+; CHECK: movs
+; CHECK: cmp r0, r1
+; CHECK: blt
+; CHECK: movs
+; CHECK: movs
+; CHECK: movs
+; CHECK: bx lr
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