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authorQuentin Colombet <qcolombet@apple.com>2018-02-17 03:05:33 +0000
committerQuentin Colombet <qcolombet@apple.com>2018-02-17 03:05:33 +0000
commit48abac82b808315d387185bb2e44688add679073 (patch)
treec823fab58ad69d0fdcce742bdc1b037d804dfd59 /llvm/test/CodeGen/Thumb
parenta1d6107b14b3ceaf5a34a00c1326775ac72e353f (diff)
downloadbcm5719-llvm-48abac82b808315d387185bb2e44688add679073.tar.gz
bcm5719-llvm-48abac82b808315d387185bb2e44688add679073.zip
Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
This reverts commit r323991. This commit breaks target that don't model all the register constraints in TableGen. So far the workaround was to set the hasExtraXXXRegAllocReq, but it proves that it doesn't cover all the cases. For instance, when mutating an instruction (like in the lowering of COPYs) the isRenamable flag is not properly updated. The same problem will happen when attaching machine operand from one instruction to another. Geoff Berry is working on a fix in https://reviews.llvm.org/D43042. llvm-svn: 325421
Diffstat (limited to 'llvm/test/CodeGen/Thumb')
-rw-r--r--llvm/test/CodeGen/Thumb/pr35836.ll4
-rw-r--r--llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll2
2 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/Thumb/pr35836.ll b/llvm/test/CodeGen/Thumb/pr35836.ll
index 743c73c799d..7765e66658a 100644
--- a/llvm/test/CodeGen/Thumb/pr35836.ll
+++ b/llvm/test/CodeGen/Thumb/pr35836.ll
@@ -37,13 +37,13 @@ while.body:
; CHECK: adds r3, r0, r1
; CHECK: push {r5}
; CHECK: pop {r1}
-; CHECK: adcs r1, r5
+; CHECK: adcs r1, r1
; CHECK: ldr r0, [sp, #12] @ 4-byte Reload
; CHECK: ldr r2, [sp, #8] @ 4-byte Reload
; CHECK: adds r2, r0, r2
; CHECK: push {r5}
; CHECK: pop {r4}
-; CHECK: adcs r4, r5
+; CHECK: adcs r4, r4
; CHECK: adds r0, r2, r5
; CHECK: push {r3}
; CHECK: pop {r0}
diff --git a/llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll b/llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll
index 471626251d5..07d724546e9 100644
--- a/llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll
@@ -598,7 +598,7 @@ declare void @abort() #0
define i32 @b_to_bx(i32 %value) {
; CHECK-LABEL: b_to_bx:
; DISABLE: push {r7, lr}
-; CHECK: cmp r0, #49
+; CHECK: cmp r1, #49
; CHECK-NEXT: bgt [[ELSE_LABEL:LBB[0-9_]+]]
; ENABLE: push {r7, lr}
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