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authorSam Parker <sam.parker@arm.com>2019-09-23 09:48:25 +0000
committerSam Parker <sam.parker@arm.com>2019-09-23 09:48:25 +0000
commit9feb429a337ff49fe119a64bff3724fb820c4501 (patch)
tree2ab99115a6b989822c1243c41a07497fe1632313 /llvm/test/CodeGen/Thumb2/mve-vctp.ll
parent14f6465c157b36c50ffe431463a9c94efda42b99 (diff)
downloadbcm5719-llvm-9feb429a337ff49fe119a64bff3724fb820c4501.tar.gz
bcm5719-llvm-9feb429a337ff49fe119a64bff3724fb820c4501.zip
[ARM][MVE] Remove old tail predicates
Remove any predicate that we replace with a vctp intrinsic, and try to remove their operands too. Also look into the exit block to see if there's any duplicates of the predicates that we've replaced and clone the vctp to be used there instead. Differential Revision: https://reviews.llvm.org/D67709 llvm-svn: 372567
Diffstat (limited to 'llvm/test/CodeGen/Thumb2/mve-vctp.ll')
-rw-r--r--llvm/test/CodeGen/Thumb2/mve-vctp.ll6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/Thumb2/mve-vctp.ll b/llvm/test/CodeGen/Thumb2/mve-vctp.ll
index d8b2a86305d..8f7e1696e67 100644
--- a/llvm/test/CodeGen/Thumb2/mve-vctp.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-vctp.ll
@@ -4,8 +4,8 @@
define void @vctp8(i32 %arg, <16 x i8> *%in, <16 x i8>* %out) {
; CHECK-LABEL: vctp8:
; CHECK: @ %bb.0:
-; CHECK-NEXT: vldrw.u32 q1, [r1]
; CHECK-NEXT: vctp.8 r0
+; CHECK-NEXT: vldrw.u32 q1, [r1]
; CHECK-NEXT: vmov.i32 q0, #0x0
; CHECK-NEXT: vpsel q0, q1, q0
; CHECK-NEXT: vstrw.32 q0, [r2]
@@ -20,8 +20,8 @@ define void @vctp8(i32 %arg, <16 x i8> *%in, <16 x i8>* %out) {
define void @vctp16(i32 %arg, <8 x i16> *%in, <8 x i16>* %out) {
; CHECK-LABEL: vctp16:
; CHECK: @ %bb.0:
-; CHECK-NEXT: vldrw.u32 q1, [r1]
; CHECK-NEXT: vctp.16 r0
+; CHECK-NEXT: vldrw.u32 q1, [r1]
; CHECK-NEXT: vmov.i32 q0, #0x0
; CHECK-NEXT: vpsel q0, q1, q0
; CHECK-NEXT: vstrw.32 q0, [r2]
@@ -36,8 +36,8 @@ define void @vctp16(i32 %arg, <8 x i16> *%in, <8 x i16>* %out) {
define void @vctp32(i32 %arg, <4 x i32> *%in, <4 x i32>* %out) {
; CHECK-LABEL: vctp32:
; CHECK: @ %bb.0:
-; CHECK-NEXT: vldrw.u32 q1, [r1]
; CHECK-NEXT: vctp.32 r0
+; CHECK-NEXT: vldrw.u32 q1, [r1]
; CHECK-NEXT: vmov.i32 q0, #0x0
; CHECK-NEXT: vpsel q0, q1, q0
; CHECK-NEXT: vstrw.32 q0, [r2]
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