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| author | Moritz Roth <moritz.roth@arm.com> | 2014-09-24 16:35:50 +0000 |
|---|---|---|
| committer | Moritz Roth <moritz.roth@arm.com> | 2014-09-24 16:35:50 +0000 |
| commit | f5d0c7c2c038ea82df132aa28620d040de9f7276 (patch) | |
| tree | ce2e1c677f873cbdf015f780049ea606c52930b7 /llvm/test/CodeGen/Thumb/dyn-stackalloc.ll | |
| parent | 7f0786587f01336598d60a5be5ac3d8138846460 (diff) | |
| download | bcm5719-llvm-f5d0c7c2c038ea82df132aa28620d040de9f7276.tar.gz bcm5719-llvm-f5d0c7c2c038ea82df132aa28620d040de9f7276.zip | |
[Thumb] Make load/store optimizer less conservative.
If it's safe to clobber the condition flags, we can do a few extra things:
it's then possible to reset the base register writeback using a SUBS, so
we can try to merge even if the base register isn't dead after the merged
instruction.
This is effectively a (heavily bug-fixed) rewrite of r208992.
llvm-svn: 218386
Diffstat (limited to 'llvm/test/CodeGen/Thumb/dyn-stackalloc.ll')
| -rw-r--r-- | llvm/test/CodeGen/Thumb/dyn-stackalloc.ll | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/Thumb/dyn-stackalloc.ll b/llvm/test/CodeGen/Thumb/dyn-stackalloc.ll index 706a21350d0..309d80217c1 100644 --- a/llvm/test/CodeGen/Thumb/dyn-stackalloc.ll +++ b/llvm/test/CodeGen/Thumb/dyn-stackalloc.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -verify-machineinstrs | FileCheck %s -check-prefix=CHECK -; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -regalloc=basic -verify-machineinstrs | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -verify-machineinstrs | FileCheck %s -check-prefix=CHECK -check-prefix=RA_GREEDY +; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -regalloc=basic -verify-machineinstrs | FileCheck %s -check-prefix=CHECK -check-prefix=RA_BASIC %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } @@ -45,7 +45,8 @@ define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { ; CHECK: sub sp, # ; CHECK: mov r[[R0:[0-9]+]], sp ; CHECK: str r{{[0-9+]}}, [r[[R0]] -; CHECK: str r{{[0-9+]}}, [r[[R0]] +; RA_GREEDY: str r{{[0-9+]}}, [r[[R0]] +; RA_BASIC: stm r[[R0]]! ; CHECK-NOT: ldr r0, [sp ; CHECK: mov r[[R1:[0-9]+]], sp ; CHECK: subs r[[R2:[0-9]+]], r[[R1]], r{{[0-9]+}} |
