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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2020-01-09 19:03:16 +0100
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2020-01-09 19:06:22 +0100
commitb51fa8670f3d9346cad068aa7300d63eb051069d (patch)
tree9f111ee80c6ba0ba882b909cf173ff25dd526961 /llvm/test/CodeGen/SystemZ
parent7bbd4076c1984165568c978ff15b77dbfe52b6f0 (diff)
downloadbcm5719-llvm-b51fa8670f3d9346cad068aa7300d63eb051069d.tar.gz
bcm5719-llvm-b51fa8670f3d9346cad068aa7300d63eb051069d.zip
[SystemZ] Fix matching another pattern for nxgrk (PR44496)
SystemZDAGToDAGISel::Select will attempt to split logical instruction with a large immediate constant. This must not happen if the result matches one of the z15 combined operations, so the code checks for those. However, one of them was missed, causing invalid code to be generated in the test case for PR44496.
Diffstat (limited to 'llvm/test/CodeGen/SystemZ')
-rw-r--r--llvm/test/CodeGen/SystemZ/not-01.ll26
1 files changed, 26 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/SystemZ/not-01.ll b/llvm/test/CodeGen/SystemZ/not-01.ll
index be2a5a88d73..62248d6a1eb 100644
--- a/llvm/test/CodeGen/SystemZ/not-01.ll
+++ b/llvm/test/CodeGen/SystemZ/not-01.ll
@@ -124,3 +124,29 @@ define i64 @f12(i64 %a) {
ret i64 %ret
}
+; NXOR 32-bit (alternate match).
+define i32 @f13(i32 %a) {
+; CHECK-LABEL: f13:
+; CHECK: lhi [[REG:%r[0-5]]], -256
+; CHECK: nxrk %r2, %r2, [[REG]]
+; CHECK: br %r14
+ ; Use an opaque const so the pattern doesn't get optimized away early.
+ %const = bitcast i32 -256 to i32
+ %neg = xor i32 %a, -1
+ %ret = xor i32 %neg, %const
+ ret i32 %ret
+}
+
+; NXOR 64-bit (alternate match).
+define i64 @f14(i64 %a) {
+; CHECK-LABEL: f14:
+; CHECK: lghi [[REG:%r[0-5]]], -256
+; CHECK: nxgrk %r2, %r2, [[REG]]
+; CHECK: br %r14
+ ; Use an opaque const so the pattern doesn't get optimized away early.
+ %const = bitcast i64 -256 to i64
+ %neg = xor i64 %a, -1
+ %ret = xor i64 %neg, %const
+ ret i64 %ret
+}
+
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