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| author | Marcin Koscielnicki <koriakin@0x04.net> | 2016-07-10 14:41:22 +0000 |
|---|---|---|
| committer | Marcin Koscielnicki <koriakin@0x04.net> | 2016-07-10 14:41:22 +0000 |
| commit | cf7cc724a728e73e1b2c3258b0adb08326c802c1 (patch) | |
| tree | 78bafc61d804bc8e576ec0843b86d5d789fb81c9 /llvm/test/CodeGen/SystemZ/tdc-04.ll | |
| parent | 303326541bab361acc5c1324b0a743a16aa3bae2 (diff) | |
| download | bcm5719-llvm-cf7cc724a728e73e1b2c3258b0adb08326c802c1.tar.gz bcm5719-llvm-cf7cc724a728e73e1b2c3258b0adb08326c802c1.zip | |
[SystemZ] Utilize Test Data Class instructions.
This adds a new SystemZ-specific intrinsic, llvm.s390.tdc.f(32|64|128),
which maps straight to the test data class instructions. A new IR pass
is added to recognize instructions that can be converted to TDC and
perform the necessary replacements.
Differential Revision: http://reviews.llvm.org/D21949
llvm-svn: 275016
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/tdc-04.ll')
| -rw-r--r-- | llvm/test/CodeGen/SystemZ/tdc-04.ll | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/SystemZ/tdc-04.ll b/llvm/test/CodeGen/SystemZ/tdc-04.ll new file mode 100644 index 00000000000..929285b0ba8 --- /dev/null +++ b/llvm/test/CodeGen/SystemZ/tdc-04.ll @@ -0,0 +1,85 @@ +; Test the Test Data Class instruction logic operation conversion from +; signbit extraction. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; + +; Extract sign bit. +define i32 @f1(float %x) { +; CHECK-LABEL: f1 +; CHECK: tceb %f0, 1365 + %cast = bitcast float %x to i32 + %res = icmp slt i32 %cast, 0 + %xres = zext i1 %res to i32 + ret i32 %xres +} + +; Extract negated sign bit. +define i32 @f2(float %x) { +; CHECK-LABEL: f2 +; CHECK: tceb %f0, 2730 + %cast = bitcast float %x to i32 + %res = icmp sgt i32 %cast, -1 + %xres = zext i1 %res to i32 + ret i32 %xres +} + +; Extract sign bit. +define i32 @f3(double %x) { +; CHECK-LABEL: f3 +; CHECK: tcdb %f0, 1365 + %cast = bitcast double %x to i64 + %res = icmp slt i64 %cast, 0 + %xres = zext i1 %res to i32 + ret i32 %xres +} + +; Extract negated sign bit. +define i32 @f4(double %x) { +; CHECK-LABEL: f4 +; CHECK: tcdb %f0, 2730 + %cast = bitcast double %x to i64 + %res = icmp sgt i64 %cast, -1 + %xres = zext i1 %res to i32 + ret i32 %xres +} + +; Extract sign bit. +define i32 @f5(fp128 %x) { +; CHECK-LABEL: f5 +; CHECK: tcxb %f0, 1365 + %cast = bitcast fp128 %x to i128 + %res = icmp slt i128 %cast, 0 + %xres = zext i1 %res to i32 + ret i32 %xres +} + +; Extract negated sign bit. +define i32 @f6(fp128 %x) { +; CHECK-LABEL: f6 +; CHECK: tcxb %f0, 2730 + %cast = bitcast fp128 %x to i128 + %res = icmp sgt i128 %cast, -1 + %xres = zext i1 %res to i32 + ret i32 %xres +} + +; Wrong const. +define i32 @f7(float %x) { +; CHECK-LABEL: f7 +; CHECK-NOT: tceb + %cast = bitcast float %x to i32 + %res = icmp slt i32 %cast, -1 + %xres = zext i1 %res to i32 + ret i32 %xres +} + +; Wrong pred. +define i32 @f8(float %x) { +; CHECK-LABEL: f8 +; CHECK-NOT: tceb + %cast = bitcast float %x to i32 + %res = icmp eq i32 %cast, 0 + %xres = zext i1 %res to i32 + ret i32 %xres +} |

