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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2018-07-20 12:12:10 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2018-07-20 12:12:10 +0000
commit9dd23b8433d59c516eac0feeef793a40f014cd08 (patch)
tree7d97d4a227ae4c02e8e09684029d3a2a994953c4 /llvm/test/CodeGen/SystemZ/int-sub-06.ll
parent57743883f11662433c7fe13bf4d59f0fca0e2d33 (diff)
downloadbcm5719-llvm-9dd23b8433d59c516eac0feeef793a40f014cd08.tar.gz
bcm5719-llvm-9dd23b8433d59c516eac0feeef793a40f014cd08.zip
[SystemZ] Test case formatting fixes
Fix systematically wrong whitespace from a prior automated change. NFC. llvm-svn: 337542
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/int-sub-06.ll')
-rw-r--r--llvm/test/CodeGen/SystemZ/int-sub-06.ll34
1 files changed, 17 insertions, 17 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-sub-06.ll b/llvm/test/CodeGen/SystemZ/int-sub-06.ll
index c26383e9df0..efc20f94c43 100644
--- a/llvm/test/CodeGen/SystemZ/int-sub-06.ll
+++ b/llvm/test/CodeGen/SystemZ/int-sub-06.ll
@@ -9,7 +9,7 @@ define void @f1(i128 *%aptr, i32 %b) {
; CHECK: slgfr {{%r[0-5]}}, %r3
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%bext = zext i32 %b to i128
%sub = sub i128 %xor, %bext
@@ -23,7 +23,7 @@ define void @f2(i128 *%aptr, i64 %b) {
; CHECK: slgfr {{%r[0-5]}}, %r3
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%trunc = trunc i64 %b to i32
%bext = zext i32 %trunc to i128
@@ -39,7 +39,7 @@ define void @f3(i128 *%aptr, i64 %b) {
; CHECK: slgfr {{%r[0-5]}}, %r3
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%bext = zext i64 %b to i128
%and = and i128 %bext, 4294967295
@@ -54,9 +54,9 @@ define void @f4(i128 *%aptr, i32 *%bsrc) {
; CHECK: slgf {{%r[0-5]}}, 0(%r3)
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
- %b = load i32 , i32 *%bsrc
+ %b = load i32, i32 *%bsrc
%bext = zext i32 %b to i128
%sub = sub i128 %xor, %bext
store i128 %sub, i128 *%aptr
@@ -69,10 +69,10 @@ define void @f5(i128 *%aptr, i32 *%bsrc) {
; CHECK: slgf {{%r[0-5]}}, 524284(%r3)
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%ptr = getelementptr i32, i32 *%bsrc, i64 131071
- %b = load i32 , i32 *%ptr
+ %b = load i32, i32 *%ptr
%bext = zext i32 %b to i128
%sub = sub i128 %xor, %bext
store i128 %sub, i128 *%aptr
@@ -87,10 +87,10 @@ define void @f6(i128 *%aptr, i32 *%bsrc) {
; CHECK: slgf {{%r[0-5]}}, 0(%r3)
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%ptr = getelementptr i32, i32 *%bsrc, i64 131072
- %b = load i32 , i32 *%ptr
+ %b = load i32, i32 *%ptr
%bext = zext i32 %b to i128
%sub = sub i128 %xor, %bext
store i128 %sub, i128 *%aptr
@@ -103,10 +103,10 @@ define void @f7(i128 *%aptr, i32 *%bsrc) {
; CHECK: slgf {{%r[0-5]}}, -4(%r3)
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%ptr = getelementptr i32, i32 *%bsrc, i128 -1
- %b = load i32 , i32 *%ptr
+ %b = load i32, i32 *%ptr
%bext = zext i32 %b to i128
%sub = sub i128 %xor, %bext
store i128 %sub, i128 *%aptr
@@ -119,10 +119,10 @@ define void @f8(i128 *%aptr, i32 *%bsrc) {
; CHECK: slgf {{%r[0-5]}}, -524288(%r3)
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%ptr = getelementptr i32, i32 *%bsrc, i128 -131072
- %b = load i32 , i32 *%ptr
+ %b = load i32, i32 *%ptr
%bext = zext i32 %b to i128
%sub = sub i128 %xor, %bext
store i128 %sub, i128 *%aptr
@@ -137,10 +137,10 @@ define void @f9(i128 *%aptr, i32 *%bsrc) {
; CHECK: slgf {{%r[0-5]}}, 0(%r3)
; CHECK: slbgr
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%ptr = getelementptr i32, i32 *%bsrc, i128 -131073
- %b = load i32 , i32 *%ptr
+ %b = load i32, i32 *%ptr
%bext = zext i32 %b to i128
%sub = sub i128 %xor, %bext
store i128 %sub, i128 *%aptr
@@ -152,12 +152,12 @@ define void @f10(i128 *%aptr, i64 %src, i64 %index) {
; CHECK-LABEL: f10:
; CHECK: slgf {{%r[0-5]}}, 524284({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
- %a = load i128 , i128 *%aptr
+ %a = load i128, i128 *%aptr
%xor = xor i128 %a, 127
%add1 = add i64 %src, %index
%add2 = add i64 %add1, 524284
%ptr = inttoptr i64 %add2 to i32 *
- %b = load i32 , i32 *%ptr
+ %b = load i32, i32 *%ptr
%bext = zext i32 %b to i128
%sub = sub i128 %xor, %bext
store i128 %sub, i128 *%aptr
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