diff options
author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-03 10:10:02 +0000 |
---|---|---|
committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-03 10:10:02 +0000 |
commit | ed1fab6b5bfb54d63102319a761011e985081cb4 (patch) | |
tree | 6f875f92916f0dc214d1f28035000331faccbac7 /llvm/test/CodeGen/SystemZ/int-div-05.ll | |
parent | d36cbaa4231e51a42d761d298ff20aaa6e88d014 (diff) | |
download | bcm5719-llvm-ed1fab6b5bfb54d63102319a761011e985081cb4.tar.gz bcm5719-llvm-ed1fab6b5bfb54d63102319a761011e985081cb4.zip |
[SystemZ] Fold more spills
Add a mapping from register-based <INSN>R instructions to the corresponding
memory-based <INSN>. Use it to cut down on the number of spill loads.
Some instructions extend their operands from smaller fields, so this
required a new TSFlags field to say how big the unextended operand is.
This optimisation doesn't trigger for C(G)R and CL(G)R because in practice
we always combine those instructions with a branch. Adding a test for every
other case probably seems excessive, but it did catch a missed optimisation
for DSGF (fixed in r185435).
llvm-svn: 185529
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/int-div-05.ll')
-rw-r--r-- | llvm/test/CodeGen/SystemZ/int-div-05.ll | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-div-05.ll b/llvm/test/CodeGen/SystemZ/int-div-05.ll index 04f622b44e7..31415034986 100644 --- a/llvm/test/CodeGen/SystemZ/int-div-05.ll +++ b/llvm/test/CodeGen/SystemZ/int-div-05.ll @@ -2,6 +2,8 @@ ; ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +declare i64 @foo() + ; Testg register division. The result is in the second of the two registers. define void @f1(i64 %dummy, i64 %a, i64 %b, i64 *%dest) { ; CHECK: f1: @@ -164,3 +166,49 @@ define i64 @f12(i64 %dummy, i64 %a, i64 %src, i64 %index) { %rem = urem i64 %a, %b ret i64 %rem } + +; Check that divisions of spilled values can use DLG rather than DLGR. +define i64 @f13(i64 *%ptr0) { +; CHECK: f13: +; CHECK: brasl %r14, foo@PLT +; CHECK: dlg {{%r[0-9]+}}, 160(%r15) +; CHECK: br %r14 + %ptr1 = getelementptr i64 *%ptr0, i64 2 + %ptr2 = getelementptr i64 *%ptr0, i64 4 + %ptr3 = getelementptr i64 *%ptr0, i64 6 + %ptr4 = getelementptr i64 *%ptr0, i64 8 + %ptr5 = getelementptr i64 *%ptr0, i64 10 + %ptr6 = getelementptr i64 *%ptr0, i64 12 + %ptr7 = getelementptr i64 *%ptr0, i64 14 + %ptr8 = getelementptr i64 *%ptr0, i64 16 + %ptr9 = getelementptr i64 *%ptr0, i64 18 + %ptr10 = getelementptr i64 *%ptr0, i64 20 + + %val0 = load i64 *%ptr0 + %val1 = load i64 *%ptr1 + %val2 = load i64 *%ptr2 + %val3 = load i64 *%ptr3 + %val4 = load i64 *%ptr4 + %val5 = load i64 *%ptr5 + %val6 = load i64 *%ptr6 + %val7 = load i64 *%ptr7 + %val8 = load i64 *%ptr8 + %val9 = load i64 *%ptr9 + %val10 = load i64 *%ptr10 + + %ret = call i64 @foo() + + %div0 = udiv i64 %ret, %val0 + %div1 = udiv i64 %div0, %val1 + %div2 = udiv i64 %div1, %val2 + %div3 = udiv i64 %div2, %val3 + %div4 = udiv i64 %div3, %val4 + %div5 = udiv i64 %div4, %val5 + %div6 = udiv i64 %div5, %val6 + %div7 = udiv i64 %div6, %val7 + %div8 = udiv i64 %div7, %val8 + %div9 = udiv i64 %div8, %val9 + %div10 = udiv i64 %div9, %val10 + + ret i64 %div10 +} |