[SystemZ] Fold more spills

Add a mapping from register-based <INSN>R instructions to the corresponding
memory-based <INSN>.  Use it to cut down on the number of spill loads.

Some instructions extend their operands from smaller fields, so this
required a new TSFlags field to say how big the unextended operand is.

This optimisation doesn't trigger for C(G)R and CL(G)R because in practice
we always combine those instructions with a branch.  Adding a test for every
other case probably seems excessive, but it did catch a missed optimisation
for DSGF (fixed in r185435).

llvm-svn: 185529

1 files changed, 43 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/SystemZ/int-div-01.ll b/llvm/test/CodeGen/SystemZ/int-div-01.ll
index 9a0066f0d0a..9fa019b98c5 100644
--- a/llvm/test/CodeGen/SystemZ/int-div-01.ll
+++ b/llvm/test/CodeGen/SystemZ/int-div-01.ll
@@ -206,3 +206,46 @@ define void @f15(i32 *%dest, i32 *%src) {
   store i32 %div, i32 *%dest
   ret void
 }
+
+; Check that divisions of spilled values can use DSGF rather than DSGFR.
+define i32 @f16(i32 *%ptr0) {
+; CHECK: f16:
+; CHECK: brasl %r14, foo@PLT
+; CHECK: dsgf {{%r[0-9]+}}, 16{{[04]}}(%r15)
+; CHECK: br %r14
+  %ptr1 = getelementptr i32 *%ptr0, i64 2
+  %ptr2 = getelementptr i32 *%ptr0, i64 4
+  %ptr3 = getelementptr i32 *%ptr0, i64 6
+  %ptr4 = getelementptr i32 *%ptr0, i64 8
+  %ptr5 = getelementptr i32 *%ptr0, i64 10
+  %ptr6 = getelementptr i32 *%ptr0, i64 12
+  %ptr7 = getelementptr i32 *%ptr0, i64 14
+  %ptr8 = getelementptr i32 *%ptr0, i64 16
+  %ptr9 = getelementptr i32 *%ptr0, i64 18
+
+  %val0 = load i32 *%ptr0
+  %val1 = load i32 *%ptr1
+  %val2 = load i32 *%ptr2
+  %val3 = load i32 *%ptr3
+  %val4 = load i32 *%ptr4
+  %val5 = load i32 *%ptr5
+  %val6 = load i32 *%ptr6
+  %val7 = load i32 *%ptr7
+  %val8 = load i32 *%ptr8
+  %val9 = load i32 *%ptr9
+
+  %ret = call i32 @foo()
+
+  %div0 = sdiv i32 %ret, %val0
+  %div1 = sdiv i32 %div0, %val1
+  %div2 = sdiv i32 %div1, %val2
+  %div3 = sdiv i32 %div2, %val3
+  %div4 = sdiv i32 %div3, %val4
+  %div5 = sdiv i32 %div4, %val5
+  %div6 = sdiv i32 %div5, %val6
+  %div7 = sdiv i32 %div6, %val7
+  %div8 = sdiv i32 %div7, %val8
+  %div9 = sdiv i32 %div8, %val9
+
+  ret i32 %div9
+}