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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-11-22 17:28:28 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-11-22 17:28:28 +0000
commitf03789ca3f5592579484d49e5a07ebec3feb5aa2 (patch)
treea7e84ada2d51c79302ad5ca73484358bf5d80b44 /llvm/test/CodeGen/SystemZ/int-cmp-47.ll
parent77aa674cc40d7eadbb88a37d70c02f6ee3bb1268 (diff)
downloadbcm5719-llvm-f03789ca3f5592579484d49e5a07ebec3feb5aa2.tar.gz
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[SystemZ] Fix TMHH and TMHL usage for z10 with -O0
I've no idea why I decided to handle TMxx differently from all the other high/low logic operations, but it was a stupid thing to do. The high registers aren't available as separate 32-bit registers on z10, so subreg_h32 can't be used on a GR64 there. I've normally been testing with z196 and with -O3 and so hadn't noticed this until now. llvm-svn: 195473
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/int-cmp-47.ll')
-rw-r--r--llvm/test/CodeGen/SystemZ/int-cmp-47.ll1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-cmp-47.ll b/llvm/test/CodeGen/SystemZ/int-cmp-47.ll
index c770ccdbb96..9ebcbfe525b 100644
--- a/llvm/test/CodeGen/SystemZ/int-cmp-47.ll
+++ b/llvm/test/CodeGen/SystemZ/int-cmp-47.ll
@@ -1,5 +1,6 @@
; Test the use of TEST UNDER MASK for 64-bit operations.
;
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
@g = global i32 0
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