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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2018-07-20 12:12:10 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2018-07-20 12:12:10 +0000 |
| commit | 9dd23b8433d59c516eac0feeef793a40f014cd08 (patch) | |
| tree | 7d97d4a227ae4c02e8e09684029d3a2a994953c4 /llvm/test/CodeGen/SystemZ/int-cmp-40.ll | |
| parent | 57743883f11662433c7fe13bf4d59f0fca0e2d33 (diff) | |
| download | bcm5719-llvm-9dd23b8433d59c516eac0feeef793a40f014cd08.tar.gz bcm5719-llvm-9dd23b8433d59c516eac0feeef793a40f014cd08.zip | |
[SystemZ] Test case formatting fixes
Fix systematically wrong whitespace from a prior automated change.
NFC.
llvm-svn: 337542
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/int-cmp-40.ll')
| -rw-r--r-- | llvm/test/CodeGen/SystemZ/int-cmp-40.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-cmp-40.ll b/llvm/test/CodeGen/SystemZ/int-cmp-40.ll index fc38940ce39..09bf903be7b 100644 --- a/llvm/test/CodeGen/SystemZ/int-cmp-40.ll +++ b/llvm/test/CodeGen/SystemZ/int-cmp-40.ll @@ -13,7 +13,7 @@ define i64 @f1(i64 %src1) { ; CHECK-NEXT: jl ; CHECK: br %r14 entry: - %val = load i16 , i16 *@g + %val = load i16, i16 *@g %src2 = zext i16 %val to i64 %cond = icmp ult i64 %src1, %src2 br i1 %cond, label %exit, label %mulb @@ -32,7 +32,7 @@ define i64 @f2(i64 %src1) { ; CHECK-NOT: clghrl ; CHECK: br %r14 entry: - %val = load i16 , i16 *@g + %val = load i16, i16 *@g %src2 = zext i16 %val to i64 %cond = icmp slt i64 %src1, %src2 br i1 %cond, label %exit, label %mulb @@ -52,7 +52,7 @@ define i64 @f3(i64 %src1) { ; CHECK-NEXT: je ; CHECK: br %r14 entry: - %val = load i16 , i16 *@g + %val = load i16, i16 *@g %src2 = zext i16 %val to i64 %cond = icmp eq i64 %src1, %src2 br i1 %cond, label %exit, label %mulb @@ -72,7 +72,7 @@ define i64 @f4(i64 %src1) { ; CHECK-NEXT: jlh ; CHECK: br %r14 entry: - %val = load i16 , i16 *@g + %val = load i16, i16 *@g %src2 = zext i16 %val to i64 %cond = icmp ne i64 %src1, %src2 br i1 %cond, label %exit, label %mulb @@ -93,7 +93,7 @@ define i64 @f5(i64 %src1) { ; CHECK: clgrjl %r2, [[VAL]], ; CHECK: br %r14 entry: - %val = load i16 , i16 *@h, align 1 + %val = load i16, i16 *@h, align 1 %src2 = zext i16 %val to i64 %cond = icmp ult i64 %src1, %src2 br i1 %cond, label %exit, label %mulb @@ -113,7 +113,7 @@ define i64 @f6(i64 %src2) { ; CHECK-NEXT: jh {{\.L.*}} ; CHECK: br %r14 entry: - %val = load i16 , i16 *@g + %val = load i16, i16 *@g %src1 = zext i16 %val to i64 %cond = icmp ult i64 %src1, %src2 br i1 %cond, label %exit, label %mulb |
