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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-28 13:53:37 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-28 13:53:37 +0000 |
| commit | 094e6097168e92c53311e04365803e87e28a4559 (patch) | |
| tree | 4ab5d8e1f3a59619bed571b287893ba950f921b6 /llvm/test/CodeGen/SystemZ/int-add-09.ll | |
| parent | cf7259c09490a96b88dd9f38552184e0c9322772 (diff) | |
| download | bcm5719-llvm-094e6097168e92c53311e04365803e87e28a4559.tar.gz bcm5719-llvm-094e6097168e92c53311e04365803e87e28a4559.zip | |
[SystemZ] Set usaAA to true
useAA significantly improves the handling of vector code that has TBAA
information attached. It also helps other cases, as shown by the testsuite
changes here. The only real downside I've seen is that it interferes with
MergeConsecutiveStores. The problem is that that optimization works top
down, starting at the first store in the chain, and looks for cases where
the chain result is only used by a single related store. These related
stores don't alias, so useAA will have rewritten all the later stores to
use a different chain input (typically the same one as the first store).
I think the advantages outweigh the disadvantages though, so for now I've
just disabled alias analysis for the unaligned-01.ll test.
llvm-svn: 193521
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/int-add-09.ll')
| -rw-r--r-- | llvm/test/CodeGen/SystemZ/int-add-09.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-add-09.ll b/llvm/test/CodeGen/SystemZ/int-add-09.ll index 717fed00e21..fd151a7f979 100644 --- a/llvm/test/CodeGen/SystemZ/int-add-09.ll +++ b/llvm/test/CodeGen/SystemZ/int-add-09.ll @@ -7,7 +7,7 @@ define void @f1(i128 *%aptr) { ; CHECK-LABEL: f1: ; CHECK: algfi {{%r[0-5]}}, 1 -; CHECK: alcgr +; CHECK: alcg ; CHECK: br %r14 %a = load i128 *%aptr %xor = xor i128 %a, 128 @@ -20,7 +20,7 @@ define void @f1(i128 *%aptr) { define void @f2(i128 *%aptr) { ; CHECK-LABEL: f2: ; CHECK: algfi {{%r[0-5]}}, 4294967295 -; CHECK: alcgr +; CHECK: alcg ; CHECK: br %r14 %a = load i128 *%aptr %xor = xor i128 %a, 128 @@ -33,7 +33,7 @@ define void @f2(i128 *%aptr) { define void @f3(i128 *%aptr) { ; CHECK-LABEL: f3: ; CHECK: algr -; CHECK: alcgr +; CHECK: alcg ; CHECK: br %r14 %a = load i128 *%aptr %xor = xor i128 %a, 128 @@ -46,7 +46,7 @@ define void @f3(i128 *%aptr) { define void @f4(i128 *%aptr) { ; CHECK-LABEL: f4: ; CHECK: algr -; CHECK: alcgr +; CHECK: alcg ; CHECK: br %r14 %a = load i128 *%aptr %xor = xor i128 %a, 128 |
