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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2018-07-20 12:12:10 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2018-07-20 12:12:10 +0000
commit9dd23b8433d59c516eac0feeef793a40f014cd08 (patch)
tree7d97d4a227ae4c02e8e09684029d3a2a994953c4 /llvm/test/CodeGen/SystemZ/int-add-01.ll
parent57743883f11662433c7fe13bf4d59f0fca0e2d33 (diff)
downloadbcm5719-llvm-9dd23b8433d59c516eac0feeef793a40f014cd08.tar.gz
bcm5719-llvm-9dd23b8433d59c516eac0feeef793a40f014cd08.zip
[SystemZ] Test case formatting fixes
Fix systematically wrong whitespace from a prior automated change. NFC. llvm-svn: 337542
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/int-add-01.ll')
-rw-r--r--llvm/test/CodeGen/SystemZ/int-add-01.ll20
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-add-01.ll b/llvm/test/CodeGen/SystemZ/int-add-01.ll
index f7a3a264913..f72ec5e5e46 100644
--- a/llvm/test/CodeGen/SystemZ/int-add-01.ll
+++ b/llvm/test/CodeGen/SystemZ/int-add-01.ll
@@ -8,7 +8,7 @@ define i32 @f1(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f1:
; CHECK: ah %r2, 0(%r3)
; CHECK: br %r14
- %half = load i16 , i16 *%src
+ %half = load i16, i16 *%src
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -20,7 +20,7 @@ define i32 @f2(i32 %lhs, i16 *%src) {
; CHECK: ah %r2, 4094(%r3)
; CHECK: br %r14
%ptr = getelementptr i16, i16 *%src, i64 2047
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -32,7 +32,7 @@ define i32 @f3(i32 %lhs, i16 *%src) {
; CHECK: ahy %r2, 4096(%r3)
; CHECK: br %r14
%ptr = getelementptr i16, i16 *%src, i64 2048
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -44,7 +44,7 @@ define i32 @f4(i32 %lhs, i16 *%src) {
; CHECK: ahy %r2, 524286(%r3)
; CHECK: br %r14
%ptr = getelementptr i16, i16 *%src, i64 262143
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -58,7 +58,7 @@ define i32 @f5(i32 %lhs, i16 *%src) {
; CHECK: ah %r2, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i16, i16 *%src, i64 262144
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -70,7 +70,7 @@ define i32 @f6(i32 %lhs, i16 *%src) {
; CHECK: ahy %r2, -2(%r3)
; CHECK: br %r14
%ptr = getelementptr i16, i16 *%src, i64 -1
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -82,7 +82,7 @@ define i32 @f7(i32 %lhs, i16 *%src) {
; CHECK: ahy %r2, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i16, i16 *%src, i64 -262144
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -96,7 +96,7 @@ define i32 @f8(i32 %lhs, i16 *%src) {
; CHECK: ah %r2, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i16, i16 *%src, i64 -262145
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -110,7 +110,7 @@ define i32 @f9(i32 %lhs, i64 %src, i64 %index) {
%add1 = add i64 %src, %index
%add2 = add i64 %add1, 4094
%ptr = inttoptr i64 %add2 to i16 *
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
@@ -124,7 +124,7 @@ define i32 @f10(i32 %lhs, i64 %src, i64 %index) {
%add1 = add i64 %src, %index
%add2 = add i64 %add1, 4096
%ptr = inttoptr i64 %add2 to i16 *
- %half = load i16 , i16 *%ptr
+ %half = load i16, i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
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