diff options
author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2018-07-20 12:12:10 +0000 |
---|---|---|
committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2018-07-20 12:12:10 +0000 |
commit | 9dd23b8433d59c516eac0feeef793a40f014cd08 (patch) | |
tree | 7d97d4a227ae4c02e8e09684029d3a2a994953c4 /llvm/test/CodeGen/SystemZ/insert-01.ll | |
parent | 57743883f11662433c7fe13bf4d59f0fca0e2d33 (diff) | |
download | bcm5719-llvm-9dd23b8433d59c516eac0feeef793a40f014cd08.tar.gz bcm5719-llvm-9dd23b8433d59c516eac0feeef793a40f014cd08.zip |
[SystemZ] Test case formatting fixes
Fix systematically wrong whitespace from a prior automated change.
NFC.
llvm-svn: 337542
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/insert-01.ll')
-rw-r--r-- | llvm/test/CodeGen/SystemZ/insert-01.ll | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/llvm/test/CodeGen/SystemZ/insert-01.ll b/llvm/test/CodeGen/SystemZ/insert-01.ll index eb39552f1a2..e6f183eae4f 100644 --- a/llvm/test/CodeGen/SystemZ/insert-01.ll +++ b/llvm/test/CodeGen/SystemZ/insert-01.ll @@ -9,7 +9,7 @@ define i32 @f1(i32 %orig, i8 *%ptr) { ; CHECK-NOT: ni ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %ptr2 = zext i8 %val to i32 %ptr1 = and i32 %orig, -256 %or = or i32 %ptr1, %ptr2 @@ -22,7 +22,7 @@ define i32 @f2(i32 %orig, i8 *%ptr) { ; CHECK-NOT: ni ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %ptr2 = zext i8 %val to i32 %ptr1 = and i32 %orig, -256 %or = or i32 %ptr2, %ptr1 @@ -36,7 +36,7 @@ define i32 @f3(i32 %orig, i8 *%ptr) { ; CHECK: nill %r2, 65024 ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %ptr2 = zext i8 %val to i32 %ptr1 = and i32 %orig, -512 %or = or i32 %ptr1, %ptr2 @@ -49,7 +49,7 @@ define i32 @f4(i32 %orig, i8 *%ptr) { ; CHECK: nill %r2, 65024 ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %ptr2 = zext i8 %val to i32 %ptr1 = and i32 %orig, -512 %or = or i32 %ptr2, %ptr1 @@ -62,7 +62,7 @@ define i32 @f5(i32 %orig, i8 *%ptr) { ; CHECK: sll %r2, 8 ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %ptr2 = zext i8 %val to i32 %ptr1 = shl i32 %orig, 8 %or = or i32 %ptr1, %ptr2 @@ -75,7 +75,7 @@ define i32 @f6(i32 %orig, i8 *%ptr) { ; CHECK: sll %r2, 8 ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %ptr2 = zext i8 %val to i32 %ptr1 = shl i32 %orig, 8 %or = or i32 %ptr2, %ptr1 @@ -88,7 +88,7 @@ define i32 @f7(i32 %orig, i8 *%ptr) { ; CHECK: lhi %r2, 256 ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %ptr2 = zext i8 %val to i32 %or = or i32 %ptr2, 256 ret i32 %or @@ -100,7 +100,7 @@ define i32 @f8(i32 %orig, i8 *%ptr) { ; CHECK: lhi %r2, 256 ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %ptr2 = zext i8 %val to i32 %or = or i32 256, %ptr2 ret i32 %or @@ -112,7 +112,7 @@ define i32 @f9(i32 %orig, i8 *%src) { ; CHECK: ic %r2, 4095(%r3) ; CHECK: br %r14 %ptr = getelementptr i8, i8 *%src, i64 4095 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 @@ -125,7 +125,7 @@ define i32 @f10(i32 %orig, i8 *%src) { ; CHECK: icy %r2, 4096(%r3) ; CHECK: br %r14 %ptr = getelementptr i8, i8 *%src, i64 4096 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 @@ -138,7 +138,7 @@ define i32 @f11(i32 %orig, i8 *%src) { ; CHECK: icy %r2, 524287(%r3) ; CHECK: br %r14 %ptr = getelementptr i8, i8 *%src, i64 524287 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 @@ -153,7 +153,7 @@ define i32 @f12(i32 %orig, i8 *%src) { ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 %ptr = getelementptr i8, i8 *%src, i64 524288 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 @@ -166,7 +166,7 @@ define i32 @f13(i32 %orig, i8 *%src) { ; CHECK: icy %r2, -1(%r3) ; CHECK: br %r14 %ptr = getelementptr i8, i8 *%src, i64 -1 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 @@ -179,7 +179,7 @@ define i32 @f14(i32 %orig, i8 *%src) { ; CHECK: icy %r2, -524288(%r3) ; CHECK: br %r14 %ptr = getelementptr i8, i8 *%src, i64 -524288 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 @@ -194,7 +194,7 @@ define i32 @f15(i32 %orig, i8 *%src) { ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 %ptr = getelementptr i8, i8 *%src, i64 -524289 - %val = load i8 , i8 *%ptr + %val = load i8, i8 *%ptr %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 @@ -208,7 +208,7 @@ define i32 @f16(i32 %orig, i8 *%src, i64 %index) { ; CHECK: br %r14 %ptr1 = getelementptr i8, i8 *%src, i64 %index %ptr2 = getelementptr i8, i8 *%ptr1, i64 4095 - %val = load i8 , i8 *%ptr2 + %val = load i8, i8 *%ptr2 %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 @@ -222,7 +222,7 @@ define i32 @f17(i32 %orig, i8 *%src, i64 %index) { ; CHECK: br %r14 %ptr1 = getelementptr i8, i8 *%src, i64 %index %ptr2 = getelementptr i8, i8 *%ptr1, i64 4096 - %val = load i8 , i8 *%ptr2 + %val = load i8, i8 *%ptr2 %src2 = zext i8 %val to i32 %src1 = and i32 %orig, -256 %or = or i32 %src2, %src1 |