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author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
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committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/SystemZ/addr-01.ll | |
parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/addr-01.ll')
-rw-r--r-- | llvm/test/CodeGen/SystemZ/addr-01.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/SystemZ/addr-01.ll b/llvm/test/CodeGen/SystemZ/addr-01.ll index d0960cdb104..736efe8887d 100644 --- a/llvm/test/CodeGen/SystemZ/addr-01.ll +++ b/llvm/test/CodeGen/SystemZ/addr-01.ll @@ -10,7 +10,7 @@ define void @f1(i64 %addr, i64 %index) { ; CHECK: br %r14 %add = add i64 %addr, %index %ptr = inttoptr i64 %add to i8 * - %a = load volatile i8 *%ptr + %a = load volatile i8 , i8 *%ptr ret void } @@ -22,7 +22,7 @@ define void @f2(i64 %addr, i64 %index) { %add1 = add i64 %addr, %index %add2 = add i64 %add1, 100 %ptr = inttoptr i64 %add2 to i8 * - %a = load volatile i8 *%ptr + %a = load volatile i8 , i8 *%ptr ret void } @@ -34,7 +34,7 @@ define void @f3(i64 %addr, i64 %index) { %add1 = add i64 %addr, 100 %add2 = add i64 %add1, %index %ptr = inttoptr i64 %add2 to i8 * - %a = load volatile i8 *%ptr + %a = load volatile i8 , i8 *%ptr ret void } @@ -46,7 +46,7 @@ define void @f4(i64 %addr, i64 %index) { %add1 = add i64 %addr, %index %add2 = sub i64 %add1, 100 %ptr = inttoptr i64 %add2 to i8 * - %a = load volatile i8 *%ptr + %a = load volatile i8 , i8 *%ptr ret void } @@ -58,7 +58,7 @@ define void @f5(i64 %addr, i64 %index) { %add1 = sub i64 %addr, 100 %add2 = add i64 %add1, %index %ptr = inttoptr i64 %add2 to i8 * - %a = load volatile i8 *%ptr + %a = load volatile i8 , i8 *%ptr ret void } @@ -72,7 +72,7 @@ define void @f6(i64 %addr, i64 %index) { %or = or i64 %aligned, 6 %add = add i64 %or, %index %ptr = inttoptr i64 %add to i8 * - %a = load volatile i8 *%ptr + %a = load volatile i8 , i8 *%ptr ret void } @@ -85,7 +85,7 @@ define void @f7(i64 %addr, i64 %index) { %or = or i64 %addr, 6 %add = add i64 %or, %index %ptr = inttoptr i64 %add to i8 * - %a = load volatile i8 *%ptr + %a = load volatile i8 , i8 *%ptr ret void } @@ -102,6 +102,6 @@ define void @f8(i64 %addr, i64 %index) { %add = add i64 %aligned, %index %or = or i64 %add, 6 %ptr = inttoptr i64 %or to i8 * - %a = load volatile i8 *%ptr + %a = load volatile i8 , i8 *%ptr ret void } |