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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-02 15:28:56 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-02 15:28:56 +0000 |
commit | f6bae1e434dd42b06f711f8b6652ec4173a8097c (patch) | |
tree | 4954a359181db906f457af1f2d6ab2f1b6fb5017 /llvm/test/CodeGen/SystemZ/Large/spill-02.py | |
parent | 1d959008d664cf6dcc0bb424f228421696d82586 (diff) | |
download | bcm5719-llvm-f6bae1e434dd42b06f711f8b6652ec4173a8097c.tar.gz bcm5719-llvm-f6bae1e434dd42b06f711f8b6652ec4173a8097c.zip |
[SystemZ] Use MVC to spill loads and stores
Try to use MVC when spilling the destination of a simple load or the source
of a simple store. As explained in the comment, this doesn't yet handle
the case where the load or store location is also a frame index, since
that could lead to two simultaneous scavenger spills, something the
backend can't handle yet. spill-02.py tests that this restriction kicks in,
but unfortunately I've not yet found a case that would fail without it.
The volatile trick I used for other scavenger tests doesn't work here
because we can't use MVC for volatile accesses anyway.
I'm planning on relaxing the restriction later, hopefully with a test
that does trigger the problem...
Tests @f8 and @f9 also showed that L(G)RL and ST(G)RL were wrongly
classified as SimpleBDX{Load,Store}. It wouldn't be easy to test for
that bug separately, which is why I didn't split out the fix as a
separate patch.
llvm-svn: 185434
Diffstat (limited to 'llvm/test/CodeGen/SystemZ/Large/spill-02.py')
-rw-r--r-- | llvm/test/CodeGen/SystemZ/Large/spill-02.py | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/SystemZ/Large/spill-02.py b/llvm/test/CodeGen/SystemZ/Large/spill-02.py new file mode 100644 index 00000000000..0eba3edecb7 --- /dev/null +++ b/llvm/test/CodeGen/SystemZ/Large/spill-02.py @@ -0,0 +1,46 @@ +# Test cases where we spill from one frame index to another, both of which +# would be out of range of MVC. At present we don't use MVC in this case. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# There are 8 usable call-saved GPRs. The first 160 bytes of the frame +# are needed for the ABI call frame, and a further 8 bytes are needed +# for the emergency spill slot. That means we will have at least one +# out-of-range slot if: +# +# count == (4096 - 168) / 8 + 8 + 1 == 500 +# +# Add in some extra just to be sure. +# +# CHECK: f1: +# CHECK-NOT: mvc +# CHECK: br %r14 +count = 510 + +print 'declare void @foo(i64 *%base0, i64 *%base1)' +print '' +print 'define void @f1() {' + +for i in range(2): + print ' %%alloc%d = alloca [%d x i64]' % (i, count / 2) + print (' %%base%d = getelementptr [%d x i64] * %%alloc%d, i64 0, i64 0' + % (i, count / 2, i)) + +print ' call void @foo(i64 *%base0, i64 *%base1)' +print '' + +for i in range(count): + print ' %%ptr%d = getelementptr i64 *%%base%d, i64 %d' % (i, i % 2, i / 2) + print ' %%val%d = load i64 *%%ptr%d' % (i, i) + print '' + +print ' call void @foo(i64 *%base0, i64 *%base1)' +print '' + +for i in range (count): + print ' store i64 %%val%d, i64 *%%ptr%d' % (i, i) + +print '' +print ' call void @foo(i64 *%base0, i64 *%base1)' +print '' +print ' ret void' +print '}' |