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| author | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2016-10-05 17:40:27 +0000 |
|---|---|---|
| committer | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2016-10-05 17:40:27 +0000 |
| commit | 12559441bd373689534f31fb234e26ef985fe529 (patch) | |
| tree | eae38b19c24af66422b214922c151623ac5630e2 /llvm/test/CodeGen/SPARC/vector-extract-elt.ll | |
| parent | ddd31e5637b104338324b002ff49d4c5c67cee4d (diff) | |
| download | bcm5719-llvm-12559441bd373689534f31fb234e26ef985fe529.tar.gz bcm5719-llvm-12559441bd373689534f31fb234e26ef985fe529.zip | |
[DAG] Teach computeKnownBits and ComputeNumSignBits in SelectionDAG to look through EXTRACT_VECTOR_ELT.
Summary: Both computeKnownBits and ComputeNumSignBits can now do a simple
look-through of EXTRACT_VECTOR_ELT. It will compute the result based
on the known bits (or known sign bits) for the vector that the element
is extracted from.
Reviewers: bogner, tstellarAMD, mkuper
Subscribers: wdng, RKSimon, jyknight, llvm-commits, nhaehnle
Differential Revision: https://reviews.llvm.org/D25007
llvm-svn: 283347
Diffstat (limited to 'llvm/test/CodeGen/SPARC/vector-extract-elt.ll')
| -rw-r--r-- | llvm/test/CodeGen/SPARC/vector-extract-elt.ll | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/SPARC/vector-extract-elt.ll b/llvm/test/CodeGen/SPARC/vector-extract-elt.ll new file mode 100644 index 00000000000..702f063bfcc --- /dev/null +++ b/llvm/test/CodeGen/SPARC/vector-extract-elt.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=sparc < %s | FileCheck %s + + +; If computeKnownSignBits (in SelectionDAG) can do a simple +; look-thru for extractelement then we we know that the add will yield a +; non-negative result. +define i1 @test1(<4 x i16>* %in) { +; CHECK-LABEL: ! BB#0: +; CHECK-NEXT: retl +; CHECK-NEXT: sethi 0, %o0 + %vec2 = load <4 x i16>, <4 x i16>* %in, align 1 + %vec3 = lshr <4 x i16> %vec2, <i16 2, i16 2, i16 2, i16 2> + %vec4 = sext <4 x i16> %vec3 to <4 x i32> + %elt0 = extractelement <4 x i32> %vec4, i32 0 + %elt1 = extractelement <4 x i32> %vec4, i32 1 + %sum = add i32 %elt0, %elt1 + %bool = icmp slt i32 %sum, 0 + ret i1 %bool +} |

